Fujitsu's Monaka CPU launches in 2027 with 144 cores, 2.9 GHz, 500W TDP, & 2x AI performance using Arm v9.3-A architecture and 3D chiplets. Fujitsu's Monaka Stacks a 2nm 144-Core CPU Atop 5nm SRAM Dies, Cutting Silicon Area 30% for 2027 Launch Fujitsu is preparing the upcoming Monaka CPU, which will succeed its A64FX chip, first featured on the Japanese Fugaku supercomputer. The predecessor was the first chip to implement Arm SVE & offers low-voltage operation on a 7nm node while aiming HPC and AI segments. The successor is being designed for a 2027 launch and will feature many upgrades […]
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Intel's 18A-P is coming to Diamond Rapids & Nova Lake CPUs, delivering backside power delivery and power boost using GAA transistors for boosted frequencies. Intel Diamond Rapids & Nova Lake CPUs Are On-Track To Deliver The Earliest of 18A-P Gains, Offering Double-Digit Frequency Gains At Low/High Voltages At Hot Chips, Intel is giving us more details on its 18A-P process technology, which brings GAA (Gate-All-Around) transistors with backside power delivery (GAA-BSPD), Power Boost, and an increased metal layer count to deliver 30% higher operating frequency at low voltages on x86 "in-production" silicon. The Futurum Research Group partnered with Intel to […]
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Cerebras is rolling out its CS-4 AI rack-scale solution this year but is also working on its next-gen CS-5 and CS6 solutions. Cerebras Takes Wafer Scale Engine To The Next-Level With CS-4, CS-5, and CS-6 AI Racks Last week, Cerebras took the curtains off its CS-4 rack-scale solution, which is powered by the WSE-3T chip. The WSE-3T is a boosted version of the WSE-3 (Wafer Scale Engine), offering much higher capabilities. At Hot Chips 2026, Cerebras is providing a deeper dive into its rack-scale solutions while also giving us a look at its next-gen solutions. So starting off with the […]
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Intel Wildcat Lake "Core Series 3" CPUs cut down on various aspects of the "Ultra" series, making them a cost-optimized solution for PCs. Intel Did More Than Just Remove Parts of & Repackage Its Existing Panther Lake Chips For Wildcat Lake A few months ago, Intel launched its Wildcat Lake "Core Series 3" CPUs. These entry-tier chips were designed for the PC segment and offered the same architectures as Panther Lake, but in cost-optimized packages. Intel's Wildcat Lake wasn't just a cost optimization on the chip front, as we also reported the company's "Project Firefly," which aimed to fine-tune products […]
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NVIDIA's Vera Rubin platform offers disruptive token throughput at a much lower cost than Blackwell, showcasing its Agentic AI prowess. NVIDIA Software Stack Optimizations Continue To Propel Blackwell, But Vera Rubin Sits In A Whole Different League For Agentic AI Use Cases The latest on-silicon agentic AI performance results were measured by NVIDIA using real-world agentic coding trajectories. The benchmark used was SemiAnalysis AgentX, which evaluates AI infrastructure such as Vera Rubin in agentic-coding inference workloads across various models such as Kimi K3, MiniMax M3, GLM5.3, Qwen3.5, and DeepSeek V4 Pro. The following table explains the key metrics of AgentX: […]
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NVIDIA's Vera CPUs & Vera Rubin servers will be powering multiple SpaceXAI platforms such as its next-gen Agentic AI workloads, Grok AI, & Starmind AI satellite. SpaceXAI Doubles Down on NVIDIA's Latest AI Platforms As It Leverages Vera CPUs & Vera Rubin Servers To Accelerate Agentic AI Workflows, & Take AI Beyond The Terrestrial Boundaries Today, NVIDIA and SpaceXAI are making a blockbuster announcement in which both companies will come together to accelerate next-gen Agentic AI workloads further by leveraging Vera Rubin and Vera CPU platforms. These announcements come a few weeks after Elon Musk committed exclusively to NVIDIA GPUs […]
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Intel has given the rundown on its next-gen AI inference accelerator, Crescent Island, which packs 32 Xe3 cores and 480 GB of LPDDR5X memory. Intel To Enter Agentic AI Accelerator Space With Xe3P-Powered Crescent Island GPUs, Offering Low-Cost & Low Power Through LP5X Memory & 350W TDPs The Intel Crescent Island GPU is based on the brand-new Xe3P architecture, which is the same graphics architecture that was teased by the company during its Panther Lake and Xe3 deep dives. The new silicon features of Crescent Island include: Software innovations for Crescent Island include: The new GPU architecture will be a […]
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NVIDIA's Groq 3 LPX is now in full production, offering big token generation speedups for Vera Rubin platforms in the Agentic AI space. NVIDIA Dials Up Vera Rubin NVL72 Token Generation Capabilities, Recording 3,400 TPS With Groq 3 LPX AI Inference Accelerators As part of its Hot Chips 2026 announcements, NVIDIA today announced that its Groq 3 LPX AI inference accelerator chip is in full production. This announcement follows the mass production announcements of Vera CPUs and Vera Rubin servers, marking the robust execution of NVIDIA's AI roadmap. The Groq 3 LPX racks serve as an extension to the NVIDIA […]
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Intel's Diamond Rapids CPUs will pack an impressive 256 P-Cores along with the latest memory and PCIe support, extending IO capabilities for next-gen AI workloads. Intel Pitches Diamond Rapids As A "Versatile" CPU For Enterprise-Scale Agentic AI, Packing Up To 256 P-Cores Intel 18A has found its success with Panther Lake for Client and Clearwater Forest for data centers. Now, Intel is building its next-gen portfolio on its next major process technology called 18A-P. The first CPUs that will feature this technology are called Diamond Rapids, which will power the Xeon 7 data center chip family. At Computex this year, […]
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Arm sees boosted demand for its AGI CPU from the booming Agentic AI segment as it deploys its 3rd Gen Neoverse cores. Arm Builds AGI CPUs For Agentic AI on The Foundation of Its Neoverse V3 Cores At Hot Chips 2026, Eddie Ramirez (Vice President of Marketing, Cloud AI Business Unit, for Arm) and Jeff Defilippi (Senior Director, Product Management, Arm) dissected the Arm AGI CPU & its customer response within the AI segment. Arm states that it has so far shipped 1.5 billion Neoverse cores into datacenters with 500 million shipments made within the past nine months. Currently, Arm […]
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IBM's next-generation chip will combine dual ISA within the core, enabling the execution of Z and Arm software simultaneously. IBM Is Sending The World's First Dual-ISA Processor Core For Tape-Out Soon IBM's Christian Zoellin (Distinguished Engineer, Z Processor Core at IBM) presented the Hot Chips 2026 talk in which he announced the first Dual-ISA (Instruction Set Architecture) Core for IBM Z and LinuxOne generation. The dual architecture allows IBM to execute both Z- and Arm-based software. IBM states that this isn't putting two different core types on one chip like Intel's P/E core or some type of emulation, but it […]
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d-Matrix proposes 3D DRAM as a solution to the rising AI data problem using stacked memory to deliver SRAM-Like bandwidth with magnitudes higher efficiency than HBM. The Time For 3D DRAM Is Now, Says d-Matrix, As It Unveils its "Raptor" 3D DRAM Solution With SRAM-Class Bandwidth As AI model sizes and KV cache continue to expand, capacity and bandwidth constraints become more visible. So far, all major DRAM manufacturers are working toward next-gen solutions that stack logic with DRAM, but d-Matrix says "The Time For 3D DRAM" is now. Today, there are two leading memory technologies for AI workloads: SRAM […]
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SK Hynix is leveraging advanced packaging technologies such as Intel's EMIB for its next-gen HBM solutions, which will eventually enter the 3D packaging stage. Scaling HBM Comes With Big Challenges & SK Hynix Is Leveraging Advanced Packaging Solutions To Address Them As It Ventures Into The 3D Era At Hot Chips 2026, Jaesik Lee (VP Package Engineering at SK Hynix) presented the "Advanced Packaging for High-Bandwidth Memory" brief, which talks about how the company plans to leverage advanced packaging tech to accelerate its HBM roadmap. The company started by presenting how HBM is currently built. The HBM structure consists of […]
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Samsung presents a bold vision for evolving the HBM base die with advanced logic processes that reviews the architecture’s bandwidth and power challenges, then outlines a three-phase roadmap, from area reclamation and functional expansion to full 3D ZHBM integration, that transforms the base die into an intelligent partner for next-generation AI systems. Samsung Charts Three-Phase HBM Roadmap Toward True 3D ZHBM That Stacks DRAM Directly On Compute For AI In the presentation by Sangwook Han, who is part of Samsung's DRAM Design Team, the main discussion revolves around the evolution of HBM using advanced logic processes, with the HBM base […]
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Micron explores what High Bandwidth Memory (HBM) is, why it is essential, how it compares to traditional DDR, and the key challenges that demand further innovation to sustain AI’s growing demands. Micron Reveals HBM Failures Caused 17% of Meta's Llama 3 Training Interruptions as the Memory Wall Deepens As AI LLMs continue to evolve, the need for advanced memory technologies has become vital for the continuous scaling and improvement of these models. But memory is now becoming a major bottleneck that is limiting the performance of AI systems. HBM is currently the leading DRAM type used in leading AI accelerators. […]
Read full article at https://wccftech.com/micron-says-ai-memory-wall-worsening-compute-outruns-hbm-bandwidth-by-3x-every-two-years/
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