The first 2nm ‘N2P’ chipsets from Qualcomm and MediaTek are scheduled to launch in the third quarter of 2026, and while the Snapdragon 8 Elite Gen 6 Pro and Dimensity 9600 Pro might share the same lithography, their pricing difference is what will determine their adoption, or lack thereof. Looking at the contrasting figures, MediaTek has an excellent opportunity to chip away at Qualcomm’s market share, as its flagship SoC is said to be 28 percent cheaper. Dimensity 9600 Pro is rumored to be priced at $216, whereas Qualcomm could charge upwards of $300 We’ve previously reported that the Snapdragon 8 Elite […]

Read full article at https://wccftech.com/mediatek-dimensity-9600-pro-cheaper-than-snapdragon-8-elite-gen-6-pro/

A major milestone has reportedly been achieved by TSMC as the world’s largest semiconductor foundry races to complete its transition from the 3nm process to the 2nm one. One of the company’s plants has reached 20,000 monthly wafers as it prepares to begin shipping chips for a long list of customers. Apple and Google are likely to introduce the first 2nm chips soon, but it's AI customers that’ll make up the majority of TSMC’s wafer volume A total of five fabs located in Taiwan are solely focused on 2nm production, according to Economic Daily News. Out of the five, Fab […]

Read full article at https://wccftech.com/tsmc-2nm-production-demand-surge/

TSMC is the undisputed king of the global semiconductor market, and to extend its lead, it has succeeded in developing cutting-edge lithography and advanced packaging. Samsung certainly has a lot of ground to cover in this aspect, but its strengths lie in being able to secure partnerships beyond its 2nm contracts, which have ultimately led to a mammoth $200 billion agreement with Broadcom to build next-generation AI infrastructure over the next five years. The major payoff will include Samsung’s 2nm process and HBM4 memory that Broadcom will use for its AI accelerators Given that memory and storage have already established […]

Read full article at https://wccftech.com/samsung-foundry-2nm-advantage-tsmc-chip-deals-worth-billions/

AMD has officially launched its EPYC Venice CPU family, spanning several chips, with performance leadership in Agentic AI with Zen 6 cores. The Industry's First 2nm HPC CPU Is Here, Meet EPYC Venice Family, Packing Up To 256 "Zen 6" Cores & 203 Billion Transistors One component that is really shaping up as the king of the Agentic AI era is the CPU. AMD is leveraging its brand new Zen 6 core architecture that will be used on its 6th Gen EPYC CPUs, codenamed Venice. AMD's EPYC Venice chips are the first HPC product to enter volume production on TSMC's […]

Read full article at https://wccftech.com/amd-epyc-venice-cpus-256-zen-6-cores-203b-transistors-over-5-ghz-stomp-nvidia-vera/

AMD has showcased its next-generation EPYC Venice CPU at the Advancing AI event, featuring a phenomenal core count of 256 based on Zen 6. AMD Is Firing Across All Cylinders With Its Next-Gen EPYC Venice CPU Lineup: Flagship With 256 "Zen 6" Cores Pictured & It's A Monster Chip For the next stream of data centers, CPUs are going to play a much more important role than GPUs due to the rise in Agentic AI & RL workflows. As such, all CPU vendors are releasing brand new chips that unleash the best capabilities for these workloads while leading the charts […]

Read full article at https://wccftech.com/amd-256-core-epyc-venice-behemoth-cpu-pictured-confirms-32-cores-per-zen-6-ccd/

The first smartphone chipsets mass produced on TSMC’s 2nm node will begin launching from next month, but that’s just a sliver of how popular the Taiwanese giant’s next-generation process has become. During the 2026 Japan Technology Symposium, TSMC’s Senior Vice President Kevin Zhang revealed that the 2nm lithography has acquired four times as many tape-outs as the previous-generation 3nm node, showing just how many companies are eager to gravitate to the advanced process. The 2nm node’s popularity is welcome news for TSMC and AI firms, but bad news for Apple and everyone else The first iteration of TSMC’s 2nm family, […]

Read full article at https://wccftech.com/tsmc-2nm-process-has-four-times-as-many-tape-outs-as-3nm/

Furiosa AI is all set to double its chip production to 50,000 units as it preps its 2nm "Stork" chip to break NVIDIA's inference dominance. Furiosa AI Claims Its 3rd Gen "Stork" 2nm Chip To Feature The Best Inference Capabilities On The Market, Will Also Double The Production of 2nd Gen Chips Next Year To Break NVIDIA's Monopoly Back in May, Furiosa AI announced its third-generation AI accelerator chip called Stork for its RNGD (Renegade) platform. The chip is built on Broadcom's 2nm technology, and the startup claims it will challenge NVIDIA with leading efficiency and the lowest cost per […]

Read full article at https://wccftech.com/furiosa-ai-doubling-chip-production-50000-units-next-year-2nm-stork-chip-challenges-nvidia-with-worlds-best-inference/

Tesla is all set to begin production of its AI5 chip on Samsung's 2nm process technology after a successful tapeout back in April. Samsung & TSMC To Produce Tesla's AI5 Chip With The Former Leveraging Its 2nm Capabilities Last month, Elon Musk announced the successful tape-out of its AI5 AI chip. Elon shared pictures of the chip, featuring a large primary die in the middle that will handle all of the compute and 12 DRAM modules on the outskirts, offering high capacity and efficiency-optimized bandwidth. The DRAM modules in the picture are from SK hynix, and while the DRAM SKU […]

Read full article at https://wccftech.com/samsung-2nm-node-lands-tesla-ai5-chip-at-its-texas-taylor-fab-silencing-yield-doubters/

AMD's Zen 6 CPUs are the main focus in the latest AIDA64 8.30 beta release, adding support for various upcoming lineups. AMD Zen 6 CPUs Are Coming Soon, & AIDA64 Is Fully Prepped With Support For Multiple Lineups FinalWire has released the latest version of its popular system monitoring software, AIDA64. The new version (8.30.8332 beta) comes with various updates, with the main release highlights being preliminary and improved support for AMD's upcoming Zen 6 CPU families. The full changelog is listed below: There are five AMD Zen 6-specific families listed for the new release. These include Mustang Peak (K1A.18), Olympic […]

Read full article at https://wccftech.com/aida64-amd-zen-6-support-mustang-peak-olympic-ridge-medusa-venice-lineups/

Samsung has proven that it can develop cutting-edge lithography, with its upcoming Exynos 2700 serving as an excellent example, as the company has been reported to be progressing well with its next flagship SoC. However, as far as its 2nm GAA process goes, a rumor states that when comparing Power, Performance, and Area (PPA) metrics, TSMC’s 2nm N2P is ahead in the race. This may explain why, alongside improving its 2nm process, Samsung is also developing innovative heat dissipation solutions for its top-end chipsets, as it’s a means towards holding its own against the competition. Exynos 2700 to be aided by Samsung’s […]

Read full article at https://wccftech.com/exynos-2700-innovative-heat-dissipation-solutions-compensate-for-poor-2nm-gaa-process/

The slightly advanced 2nm ‘N2P’ process from TSMC is reportedly being used by Qualcomm and MediaTek, with both companies aiming to gain an advantage over Apple later this year. However, the Cupertino firm is expected to match its rivals’ competitiveness by adopting the same manufacturing process next year for the A21 Pro, but only the latter will receive preferential treatment for the improved technology, not the A21. Standard A21 for the base iPhone 20 could stick with TSMC’s 2nm N2, as wafer and memory costs threaten to chew through Apple’s profits In a report from Commercial Times, Apple is reported […]

Read full article at https://wccftech.com/apple-a21-pro-exclusively-use-tsmc-2nm-n2p-process/

AMD's EPYC Venice CPUs have entered volume production, making them the first HPC product to achieve the milestone on TSMC's 2nm process tech. AMD & TSMC Enter Volume Production On The Industry's First 2nm HPC Chip, 6th Gen EPYC Venice The Agentic AI boom is driving the CPU market up, unlike anything that came before. High-Performance CPUs are seeing massive demands, and AMD, being a leader in HPC, has just achieved volume ramp of its next-generation EPYC Venice CPUs based on the Zen 6 core architecture. The volume ramp was achieved on TSMC's cutting-edge 2nm process technology. Looking ahead, AMD […]

Read full article at https://wccftech.com/amd-epyc-venice-industrys-first-tsmc-2nm-hpc-chip-to-achieve-volume-ramp/

The Galaxy S27 lineup arriving in early 2027 will be treated to a few watered-down features as Samsung is currently losing its skirmish with the DRAM crisis, along with the rest of the industry. Previously, it was rumored that the base model would need to feature BOE-made OLED panels to keep prices low, and now, the Exynos 2700 powering a percentage of these handsets is going to be missing a key technological feature, despite utilizing Samsung’s newest second-generation 2nm GAA process. Exynos 2700 may not leverage Samsung’s newest chip packaging, leaving some performance on the table So far, the biggest cost-cutting […]

Read full article at https://wccftech.com/exynos-2700-to-see-one-feature-removed-as-part-of-cost-cutting-move/

TSMC’s slightly advanced 2nm ‘N2P’ process has been reported to be utilized by Qualcomm and MediaTek this year, as both companies seemingly want to obtain an edge over Apple’s A20 and A20 Pro. The advantage of moving to an improved node is that these Android chipset manufacturers can target a higher clock speed for increased single-core and multi-core performance. The drawback is that shifting to this technology can risk mass adoption from smartphone makers due to the major cost increases. The first 2nm chipsets from Qualcomm and MediaTek could cost 20 percent more than current SoCs, but it’s likely that these […]

Read full article at https://wccftech.com/qualcomm-and-mediatek-2nm-chipsets-could-risk-adoption-this-year/

In what is entirely in line with rumors that have been swirling fairly persistently, AMD appears to have settled on Samsung's chip fabrication arm to produce its next-gen 2nm CPUs, Venice and Verano, as per the outlines of a fresh speculative reverie, this time from Daishin Securities. AMD best fits the contours of a fresh rumor that suggests Samsung has just won an order for 2nm CPUs The prolific tipster Jukan has just cited Daishin Securities to note that Samsung has likely won a new order for 2nm notebook CPUs. While Daishin only referenced a "North American fabless customer," Jukan […]

Read full article at https://wccftech.com/samsung-foundry-has-apparently-won-a-2nm-cpu-order-from-a-north-american-fabless-customer-with-amd-identified-as-the-orders-source/

The industry’s first 2nm chipsets are launching later this year, with Qualcomm’s Snapdragon 8 Elite Gen 6 and Snapdragon 8 Elite Gen 6 Pro rumored on multiple occasions to take advantage of TSMC’s next-generation lithography. As expected, this manufacturing process is costly, with phone makers likely adopting these solutions in their absolute top-tier offerings, and in the middle of a DRAM crisis, their margins will be drastically affected. Fortunately, the latest rumor from a tipster states that Qualcomm will have plenty of options arriving this year for customers, allowing them to offer immense diversification of smartphone models in the fourth quarter […]

Read full article at https://wccftech.com/qualcomm-to-offer-various-2nm-and-3nm-chipset-options-this-year/

TSMC's next-generation A16 or 1.6nm process tech will be the start of its "Angstrom Era" journey, delivering improved performance/power profiles versus 2nm. Angstrom Era For TSMC - A16 Process Tech Offers Better Performance/Power Profiles Versus 2nm While Adding Backside Power At the 2026 VLSI symposium, TSMC will be presenting its A16 process node technology. A16 is part of TSMC's Angstrom era family of nodes, which includes A14 and the recently announced A13 & A12. In a preview provided by VLSI of the upcoming paper titled "T1.5", TSMC restates the performance/power profile advantages. One of the biggest features for A16 will […]

Read full article at https://wccftech.com/tsmc-a16-node-promises-speed-boost-power-cut-over-2nm-backside-power-production-q4-2026/

TSMC is all set to double its 2nm production capacity through five state-of-the-art fabrication plants to meet global AI and chip demand. TSMC's 2nm Output To Be 45% Higher Than 3nm At The Same Stage As Production Ramps Up Recently, we shared how TSMC is gearing up to boost its 2nm and 3nm wafer output aggressively by the end of 2026. Now, the company is reportedly going to double its 2nm capacity output to meet "explosive" demand for AI and compute. As such, TSMC has set up five wafer fabs, all entering ramp-up phase this year towards 2 nano-meter proceses. […]

Read full article at https://wccftech.com/tsmc-doubles-down-on-2nm-five-fabs-ramping-at-once-output-eclipse-3nm-by-2x/

Bolt Graphics has officially announced the successful tape-out of its Zeus GPU test chip based on TSMC's 12nm FFC process node. This architecture, which has undergone four years of FPGA testing and customer evaluation, is designed as a highly scalable compute platform targeting high-performance computing (HPC), AI, and professional rendering. 

The Zeus GPU(via Guru3D) is designed to scale across multiple configurations, including single-slot PCIe cards and massive 2U server systems. The entry-level “Bolt Zeus 1c26” single-chiplet model features 32GB of LPDDR5X memory and two DDR5 SO-DIMM slots, allowing for memory expansion up to 160GB within a modest 120W power envelope. For more intensive workloads, the dual-chiplet “2c26” variant offers up to 128GB of onboard LPDDR5X and four SO-DIMM slots for a total capacity of 384GB. This configuration is rated for 154 Gigarays of path tracing performance and 40 TFLOPs of FP16 compute at a 250W TBP.

Bolt Graphics' performance benchmarks place the Zeus GPU significantly ahead of Nvidia's RTX 5090. The company claims the 120W single-chiplet Zeus offers 2.5x the path tracing performance of a 575W RTX 5090, increasing to 5x with the 250W dual-chiplet GPU and 10x with the 4-chiplet GPU. In the HPC sector, Bolt reports up to a twelve-fold performance increase, while electromagnetic simulations reportedly see a 300x boost when comparing a quad-chiplet Zeus setup to a single RTX 5090.

While the hardware has reached tape-out, Bolt expects to begin mass production and achieve broad product availability only by Q4 2027. The company claims the Zeus platform can reduce total compute costs by up to 17 times compared to current market leaders, with a focus on performance-per-dollar efficiency.

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KitGuru says: With Zeus promising to outperform an RTX 5090 in path tracing while using less than half the power in an older node, do you think we're seeing a shift toward “compute-first” GPU architectures that move away from traditional gaming-centric designs?