MLCommons has published MLPerf Inference v6.1, and the round sets a participation record with 30 submitting organizations and 486 datacenter and edge results. Two new tests join the suite: an End-to-End RAG pipeline for the datacenter and an Edge Agentic Inference benchmark for single-user devices, and the results carry the first peer-reviewed numbers for NVIDIA’s Vera Rubin NVL72, AMD’s Instinct MI350P, Intel’s Arc Pro B70, and AMD’s Ryzen AI Max+ 395. On the pace of improvement, MLCommons says the best per-accelerator DeepSeek-R1 result in the server scenario is 5.7x better than in v5.1 a year ago, and the best VLM result improved 2.99x in the six months since v6.0.

Two New Tests: End-to-End RAG and Edge Agentic Inference

The End-to-End RAG benchmark measures a complete question-answering pipeline, several models and a vector database working together. The reference implementation runs four models together: gpt-oss-120B handles query decomposition, sufficiency checking, and answer generation; gpt-oss-20B grades retrieved documents; e5-base-v2 produces embeddings; and ColBERTv2 reranks passages. The corpus comprises 107,484 passages, chunked from 2,515 HTML files; the questions are 824 multi-hop tasks from Google’s FRAMES dataset; and each task can loop through up to 5 retrieval rounds before the pipeline decides it has enough evidence. Two metrics come out: documents per second for building the FAISS HNSW vector database, and tasks per second for answering questions against it. A Llama 3.1-8B judge scores the final answers against a 97% accuracy target, and the judging isn’t timed.

The Edge Agentic Inference benchmark targets the coding-assistant pattern that has moved onto workstations and desktop AI boxes. The model is Qwen3.6-27B with thinking off, run as a Q4_K_M GGUF under llama.cpp in the reference, with a 32K context window served per turn. The performance workload is a recorded replay of 20 agentic coding trajectories drawn from SWE-bench Verified, totaling 1,007 turns, driven in a single stream with one request in flight, the way a developer on a laptop runs an agent. The reported metric is mean latency per turn, with time-to-first-token and time-per-output-token distributions alongside, and accuracy is gated separately by BFCL v4 at 97% of the reference score. MLCommons adapted the framework from its upcoming MLPerf Agentic datacenter benchmark.

“We added the End-to-end RAG test because it’s clear that query-answering has evolved beyond simply an LLM trained on a corpus; stakeholders need to understand the real-world performance of the types of multi-step, multi-component pipelines that are being built today,” said Miro Hodak, MLPerf Inference working group co-chair. “Likewise, we added the Edge Agentic Inference test because complex inference systems with agentic properties are increasingly hosted on edge computing devices, creating a new set of performance challenges our customers face today.”

The round also extends speculative decoding support, previously limited to DeepSeek-R1, to the GPT-OSS benchmark in the interactive scenario, and defines a new interactive scenario for the VLM test with responses targeted at about 1.5 seconds.

New Silicon From the Desktop to the Rack

NVIDIA’s Vera Rubin NVL72 makes its MLPerf debut in the preview category, submitted by NVIDIA and by Nebius on its VR200 NVL72. NVIDIA reports up to 2.5x higher token throughput than the GB300 NVL72 on DeepSeek-R1 across offline, server, and interactive scenarios using TensorRT-LLM, and up to 3.7x on the Qwen3 vision-language model using vLLM with NVIDIA Dynamo. Those are NVIDIA’s comparisons against its own prior generation, and the preview designation means the platform is expected to be commercially available by the next round.

AMD expanded its MLPerf Inference 6.1 submission to six model families across language, reasoning, text-to-video, and recommendation tasks, deploying the Instinct MI355X, MI350X, and the new MI350P PCIe card. The 512-GPU Crusoe cluster built on the MI355X is covered below, along with AMD’s own breakdown of the round.

Intel’s Arc Pro B70 shows up in a four-GPU node with 128GB of combined VRAM that Intel used for Llama 3.1-8B, Llama 2-70B, gpt-oss-120B, Whisper, and the new E2E-RAG test; Intel reports gpt-oss-120B improved 36% in server and 27% in offline over v6.0 on the same hardware. On the CPU side, Intel says Xeon 6980P Llama 3.1-8B server throughput rose 2.4x from v6.0 on identical silicon, a software-only gain.

The Ryzen AI Max+ 395 appears through Atlas Inference, a first-time submitter that ran the new Edge Agentic workload on both an NVIDIA DGX Spark and an AMD Strix Halo desktop with the same engine and quantization recipe. Atlas reports 20.1 tokens per second on the DGX Spark, completing all 1,007 turns in under 64 minutes, and 19.63 tokens per second on Strix Halo. That’s a narrower gap than we measured between the two platforms with off-the-shelf runtimes in our Ryzen AI Halo and DGX Spark reviews, and it’s the kind of result the new benchmark is designed to surface.

Bigger, More Diverse, and More Distributed

Multi-node submissions hit a record this round, up from zero in v4.0, and three stand out. Crusoe, another first-time submitter, ran the largest system in MLPerf Inference history with AMD: 512 Instinct MI355X GPUs across 64 nodes on a standard RoCE Ethernet fabric, submitted for gpt-oss-120b and DeepSeek-R1. AMD reports 5.75 million tokens per second in the offline scenario and 5.39 million in server on gpt-oss-120b from that cluster, and 2.90 million offline and 2.41 million server on DeepSeek-R1, which AMD calls the highest aggregate token throughput in MLPerf history, with throughput scaling near-linearly from 1 to 64 nodes. The gpt-oss-120b run served the model as 512 independent single-GPU replicas in native MXFP4; DeepSeek-R1 used SGLang with one eight-GPU replica per node. AMD separately cites a 72-GPU GPT-OSS-120B submission at 95% scaling efficiency and 1 million tokens per second, the same headline it hit on MI355X in v6.0.

Cisco submitted the benchmark’s first cross-vendor heterogeneous system, pooling eight NVIDIA H200 and eight AMD Instinct MI350X GPUs into a single inference pool over a Cisco Silicon One G200 fabric, the same mixed-accelerator approach it’s selling through its Secure AI Factory. The geographically distributed entry came from MangoBoost with Dell: four sites on two continents, hosted by MangoBoost, Dell, TensorWave, and Microsoft Azure, spanning the Pacific and running as one endpoint at what MangoBoost reports as 97% scaling efficiency. MangoBoost also claims the first prefill/decode-disaggregated results on AMD Instinct GPUs.

Elsewhere in the results, CoreWeave reports 1.16 million tokens per second aggregate on GB300 NVL72 with per-GPU offline throughput up 17% since v6.0, HPE cites 8,500 tokens per second per GPU on DeepSeek-R1 across two Compute XD690 servers with Blackwell Ultra, and Google focused its submission on DeepSeek-R1, citing the industry’s shift to large mixture-of-experts models. gpt-oss-120b drew 112 submissions, the most of any MLPerf workload.

AMD’s Two CDNA 4 Form Factors: OAM and Dual-Slot PCIe

AMD’s CDNA 4 architecture is available in two physical form factors to meet specific data center power and cooling constraints. The flagship Instinct MI355X targets high-density compute nodes using an OAM form factor on an OCP Universal Baseboard (UBB 2.0) platform, providing 256 compute units, 288 GB of HBM3E memory, and 8 TB/s of aggregate memory bandwidth. It delivers up to 10.1 PFLOPS of peak theoretical MXFP4 and MXFP6 matrix compute. The newly introduced Instinct MI350P adapts that same CDNA 4 silicon into a dual-slot PCIe 5.0 add-in card for standard enterprise chassis, housing 128 compute units, 144 GB of HBM3E memory, 4 TB/s of bandwidth, and delivering up to 4.6 PFLOPS of peak theoretical MXFP4 and MXFP6 matrix performance.

Software-Driven Generational Uplift on Identical Silicon

Software optimizations in AMD ROCm v7 yielded measurable throughput gains on identical MI355X hardware during a single MLPerf cycle. Testing on an eight-GPU MI355X node showed GPT-OSS-120B throughput rose by 28% in the Offline scenario and 38% in the Server scenario, while Wan-2.2 SingleStream performance improved by 70%. At cluster scale, 72 MI355X accelerators in MLPerf 6.1 achieved higher aggregate GPT-OSS-120B throughput than a 94-GPU configuration reported in round 6.0. In competitive comparisons published by AMD, the eight-GPU MI355X led submitted results against the NVIDIA B200 and B300 on GPT-OSS-120B, while the 72-GPU cluster led NVIDIA’s GB200 submission.

In its first MLPerf round, the dual-slot MI350P submitted across five Closed workloads, posting leading results against selected submissions of the NVIDIA RTX PRO 6000 Server Edition and H200 NVL. For deployments sensitive to power and cooling budgets, an eight-GPU MI350X system maintained approximately 80% of the MI355X platform’s benchmark performance across GPT-OSS, Llama, Wan, and DLRM workloads, while the MI355X carries a 40% higher rated TDP. A commissioned study by Signal65 reported that these throughput numbers translated to lower operational cost per document and higher token output per dollar within fixed latency limits.

AMD Partner Results and the Korea-to-US Cluster

AMD says comparable MI355X submissions from seven partners, Dell Technologies, Oracle, Hewlett Packard Enterprise, Supermicro, MangoBoost, Crusoe, and MiTAC, averaged within 4% of its reference system results, with some runs matching or slightly exceeding them.

The MangoBoost and Dell entry noted above is the benchmark’s first heterogeneous 32-GPU serving configuration, bridging 16 previous-generation Instinct MI300X GPUs in Korea with 16 Instinct MI355X GPUs in the United States into a unified GPT-OSS-120B endpoint. The split-cluster configuration delivered 285,454 Offline tokens per second and 253,501 Server tokens per second. The submissions ran on ROCm 7; AMD points to the ROCm 10 release, with vLLM, SGLang, and ROCm.AI profiling tools, as the path forward ahead of the HBM4-based MI400 Series and the MI500 generation that follows.

The Harness That Replaces MLPerf Inference in the Datacenter

Sixteen of the 30 submitters used MLPerf’s API-centric harness this round, up from a single open-division submitter in v6.0. The harness runs a true client/server setup over standard APIs against a hosted endpoint, which is how datacenter inference is deployed, and it already carries the new Edge Agentic test, VLM-Interactive, gpt-oss, DeepSeek-R1, Llama 3.1-8B, and text-to-video. It’s the foundation of MLPerf Endpoints, which opens on-demand rolling submissions in October 2026 and replaces MLPerf Inference as the datacenter benchmark in 2027, with normalized results and expanded agentic workloads planned for Endpoints v1.0.

“Moving forward, MLPerf Endpoints will replace Inference in our family of benchmarks for the datacenter, and the quick uptake of our API-centric harness will contribute to making that transition seamless,” said David Kanter, head of MLPerf. The six first-time submitters this round are Atlas Inference, Crusoe, Orrick Industries, ScitiX, VibeHPC, and individual contributor Naeem Khoshnevis of Harvard’s Kempner Institute, who submitted a single-H200 Llama 3.1-8B result.

The inference round follows the MLPerf Storage v3.0 results published two weeks ago, and full datacenter and edge tables, along with submitter supplementals, are available on the MLCommons results pages.

MLPerf Inference v6.1 Datacenter Results

MLPerf Inference v6.1 Edge Results

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Micron has demonstrated a 512GB DDR5 RDIMM running on multiple server platforms, which it calls the world’s first module at that capacity, and says AMD and Intel are both validating it for their next-generation server platforms. The module is rated for speeds up to 9,200 MT/s, and in a 24-slot dual-socket server it puts 12TB of DDR5 behind two CPUs. Volume production is scheduled for the second half of 2027.

How Micron Gets to 512GB on One Module

Micron vertically stacks DRAM dies inside each package and connects them with through-silicon vias (TSVs), the same die-stacking approach HBM uses. Stacking more dies per package doubles the capacity per slot without changing the module’s footprint or the server’s DIMM count, which is how a dual-socket, 24-slot system reaches 12TB.

“Micron continues to set the pace for memory technology, delivering a new class of ultra-dense, high-performance server memory that helps customers keep larger datasets closer to the compute engines that need them,” said Raj Narasimhan, senior vice president and general manager of the Cloud Memory Business Unit at Micron. “A 512GB RDIMM enables multi-terabyte servers, supporting larger AI and database workloads, greater virtualization density and improved power efficiency, all within existing server footprints.”

The 9,200 MT/s rating is the other notable figure, well past the DDR5-6400 ceiling for standard RDIMMs on current Xeon 6 platforms, and Micron’s release ties the module to next-generation platforms from both CPU vendors, so the speed and the capacity appear to arrive together with the 2027 server cycle. Micron RDIMMs have populated many of the Xeon 6 and EPYC systems through our lab, and its MRDIMMs were behind the HPE XD230’s STAC-A2 record earlier this year.

One 512GB Module Against Four 128GB Modules

Micron’s efficiency claim is that a single 512GB RDIMM cuts operating power by more than 60% compared with four 128GB RDIMMs of the same total capacity. 16W for the 512GB module against 44.2W for the four 128GB modules combined, a 63.8% reduction, or roughly 31mW per gigabyte against 86mW. The comparison assumes a server that has four free slots to spend on the alternative; the more common case is a server that has run out of slots, where the 512GB module is the only way to add capacity at all. The density argument is significant in many use cases, and it’s a similar one we made around their 245TB SSD recently.

On performance, Micron cites up to 1.4x higher throughput for memory-bound workloads such as Spark SVM-based data analytics compared with 256GB DDR5 configurations, and says the module improves throughput and concurrency for memory-intensive databases and caching platforms including RocksDB and Redis.

AMD, Intel, and an Early Customer Voice

Both CPU vendors supplied validation statements. “Our close engineering collaboration with Micron brings compute and memory innovation together to help customers realize the full value of AMD-powered platforms,” said Amit Goel, corporate vice president, Compute and Enterprise AI Platform Solutions Engineering at AMD. Karin Eibschitz Segal, general manager of platform and system engineering in Intel’s Data Center Group, said Intel “is working closely with Micron to validate its 512GB DDR5 RDIMM and help enable future server platforms designed to meet the growing demands of next-generation data center workloads.”

The release also carries a customer-side quote from Darrin Alves, chief information officer for Infrastructure Platforms at JPMorganChase, who said higher-capacity memory “will help enterprises support larger in-memory workloads, improve resource utilization and enhance the flexibility needed to scale modern computing environments.” In-memory databases, large-scale virtualization, and CPU-side inference for LLMs and agentic workloads are the use cases Micron names, all of which are gated by how much data a server can hold in main memory before spilling to storage.

Timing

The second-half 2027 production target puts the 512GB RDIMM a year or more out. In August, Micron and SK hynix committed billions to new DRAM fabs, with little of that capacity landing before 2028, so the module arrives in the same window as the wafer output it will draw on.

Micron DDR5 RDIMM Product Page

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Seagate and WD published separate AI storage studies within days of each other; the headline numbers: Seagate says 99% of enterprises expect AI to increase their storage requirements over the next three years, while WD’s IDC research puts the comparable figure at 74%. Read the fine print, and both reports land in the same directional place. AI is generating more data, enterprises intend to keep more of it for longer, and storage is taking a larger share of AI infrastructure planning than the GPU-centric conversation of the past two years suggested.

The two studies don’t measure the trend the same way. Seagate’s Data Infrastructure Readiness Report surveyed more than 2,700 enterprise technology decision-makers across seven markets, while WD commissioned IDC to survey 763 IT and business decision-makers responsible for AI architecture and storage across seven countries. Different questions, thresholds, and sample sizes make some of the main numbers look farther apart than they probably are.

The Numbers Differ Because the Questions Do

Seagate found that 99% of respondents expect AI to increase storage requirements over the next three years, with 70% anticipating an increase of at least 26% and 32% expecting requirements to rise by more than half. Only 38% consider their organizations fully prepared for AI’s long-term data demands, even though 83% describe themselves as fully or mostly prepared.

WD’s study starts from what has already happened. IDC found that 94.7% of respondents are storing more data because of AI and generative AI adoption over the past 12 months, 61% saw data growth of 25% or more in the previous year, and 74% expect volumes to grow by at least 25% over the next three years.

The gap between 99% and 74% looks substantial until you compare the questions. Seagate’s 99% covers respondents expecting any increase in storage requirements, while WD’s 74% counts only organizations expecting growth of at least 25%.

Where the two reports line up more closely is on the changing value and lifespan of enterprise data. WD found that 74.3% of respondents are retaining data longer because of AI and GenAI, 75.9% are bringing increasing volumes of archived cold-tier data back online, and 96% expect faster archive retrieval to become necessary for AI inference and retrieval-augmented generation workloads. The same share, 75.9%, said augmenting datasets with synthetic data has both raised the value of existing data and produced new datasets, which is one more reason the pile keeps growing.

WD also found that 74.6% of enterprise data resides in warm, cool, and cold tiers, and more than 60% of data lake capacity is cold or infrequently accessed. If AI workloads keep pulling historical information back into use, the line between active and archived data gets blurrier than tiering policies have assumed, a point that squares with the archive demand we saw in the Q1 LTO shipment numbers.

Storage Is Part of a Larger AI Readiness Problem

Seagate’s study places storage inside a wider set of infrastructure challenges. Data quality and readiness was cited by 53% of respondents as a leading AI deployment challenge, followed by storage infrastructure at 43%, compute availability at 27%, and energy constraints at 24%.

That ordering matters because compute has dominated the AI infrastructure discussion. Seagate’s respondents still put GPUs high on their spending lists, but security and compliance ranked first at 44%, data management and governance second at 43%, and AI and GPU infrastructure tied with storage hardware refreshes at 39%. Energy is already shaping those plans: 77% said their organization has delayed or restructured an expansion over power and sustainability concerns.

WD reaches a similar conclusion through the data lifecycle. Historical information that once sat in colder storage may need to come back quickly for inference, RAG, or other AI workloads, which pushes organizations to balance capacity, accessibility, performance, and cost across tiers. WD’s respondents also put security ahead of cost when asked about their biggest storage concerns for AI workloads: security and data protection led at 58.1%, followed by reliability and data durability at 49.7% and performance at 48.4%, with cost of storage media fourth at 44.2%.

What Buyers Can Take From Both Studies

Neither study makes a case for one storage technology over another. Both show AI increasing storage requirements, and WD’s adds that organizations are retaining data longer and pulling more archived information back into active use.

Seagate frames the response as workload-aligned, multi-tiered architectures that balance performance, capacity, efficiency, and long-term value against the needs of each dataset. WD gets to the same place by showing that most enterprise data already sits outside the hottest tier while demand for fast access to archived data climbs.

That leaves buyers with a planning problem that’s bigger than adding capacity. They have to decide how much data to retain, how quickly each class of data needs to be reachable, and what it will cost to store and manage those datasets as they grow. Both vendors would like the answer to include a lot of hard drives; the survey data suggests the buyers asking the question rank security, durability, and performance ahead of the price of the media.

Flash vendors are working the other side of the same constraints. Seagate’s 77% who’ve delayed or restructured an expansion over power and sustainability is the opening for high-capacity QLC, and our Micron 6600 ION 245TB paper measured what that swap looks like: one 245TB SSD replaced eight 30TB nearline drives in the same Dell R5715, drew 170.2W under sequential writes against 173.5W for the HDD array at idle, and at exabyte scale fit in 6 racks against 22 for the densest HDD enclosures. Hard drives keep the acquisition cost advantage per terabyte, and both surveys show the cold and archive tiers where that still decides the purchase are growing. Where power and floor space are the binding constraints, flash is pricing itself against the GPUs it frees room for, a comparison neither HDD-funded study set out to make.

Seagate Data Infrastructure Readiness Report 2026

IDC White Paper for WD: Built for Scale, The Enduring Role of HDDs in the AI Era

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Other World Computing (OWC) has acquired OpenDrives, the Los Angeles software-defined storage company whose Atlas platform has sat behind Hollywood studios, post houses, and live broadcast networks since 2011. The deal brings OpenDrives’ Atlas, Astraeus, and Edge platforms into OWC’s shared storage portfolio alongside the Jellyfish line, and OWC says it extends that line into enterprise-scale data management, hybrid cloud orchestration, and edge workflows. Terms weren’t disclosed.

What OpenDrives Brings

OpenDrives’ Atlas data storage and management platform is the core of the deal. It’s built for the low-latency, high-throughput work that uncompressed video pipelines demand, and it’s been the company’s flagship since 2011, with hardware and software updates we covered through the Ultra hardware platform and Atlas 2.1. Two newer products round out the portfolio. OpenDrives Edge, announced in April 2026, is a hybrid cloud-edge performance accelerator that gives distributed teams at edge sites local-speed data access without the cost and complexity of a conventional hybrid cloud workflow. Astraeus is a cloud-native data services platform aimed at infrastructure modernization and at bridging data silos while cutting costs; it went into beta with early adopters in late 2025, and OWC says an updated release is planned for 2027.

Building on Jellyfish

OWC bought Jellyfish from LumaForge in 2021 and has expanded it since into a range that runs from mobile and desktop production through the enterprise-class rackmount and all-flash XT systems and on to petabyte-scale deployments. OpenDrives adds the software-defined management and cloud layers that line didn’t have.

“OWC and OpenDrives share so much synergy; we couldn’t be more excited about this partnership,” said Trevor Morgan, CEO of OpenDrives. He described the combined lineup as an end-to-end data ecosystem running from plug-and-play edit bays to global enterprise pipelines that handle uncompressed 8K and 12K workflows across on-premises, edge, and hybrid cloud, with OpenDrives customers picking up OWC’s direct-attached and shared storage products for archive and backup.

OWC founder and CEO Larry O’Connor framed the acquisition as connecting the company’s storage and workflow hardware with software-defined data management services, so customers can capture, create, collaborate, and access content wherever they’re working. OpenDrives’ employees join OWC, which O’Connor said now numbers more than 250 people worldwide. Joel Whitley, partner at OpenDrives investor IAG Capital Partners, said OWC shares OpenDrives’ focus on creators and will carry on its product line for creative teams.

For OWC, the move is a step up the stack, especially for M&E workloads. Jellyfish has been a hardware story, and OpenDrives’ Atlas, Edge, and Astraeus give the company a software and services layer it can sell into the same studios and broadcasters, with Edge and Astraeus aimed at the distributed production teams that Jellyfish alone couldn’t serve.

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NVIDIA has added CUDA-Q Logical to its open-source CUDA-Q platform, an orchestration layer for building applications that run on fault-tolerant quantum computers, and it arrives with two numbers that are interesting. Fermilab says the tool cut a fault-tolerant algorithm design cycle from five months to three weeks, and Iceberg Quantum used it to show that Diraq’s spin-qubit hardware can reach 1,000 logical qubits with 150,000 physical qubits, roughly 10x fewer than Diraq’s previous estimate. Both results are early-access work reported by the labs and vendors involved, but they’re the first concrete figures for a tool aimed at the next stage of quantum computing, where error-corrected logical qubits replace raw physical ones.

Why Codesign Is the Bottleneck

Fault-tolerant processors built on logical qubits are what make useful quantum computing possible, because they overcome the errors inherent in physical qubits and can execute the larger computations that drug discovery, financial modeling, and materials science need. Designing an application for one of those systems means juggling the algorithm, the error-correction code, the hardware architecture, and the rest of the QPU at the same time, and NVIDIA says that changing any one of them can swing the resources the application needs. CUDA-Q Logical lets researchers describe all of those components together and swap between options to find the configuration that performs best with logical qubits.

“Quantum computing is maturing into an era of logical qubits, and researchers need an open, customizable platform capable of representing all aspects of a fault-tolerant system,” said Timothy Costa, vice president and general manager of quantum at NVIDIA. NVIDIA lists Fermi National Accelerator Laboratory, Infleqtion, IQM Quantum Computers, QCDesign, Quantum Motion, and Sandia National Laboratories among the QPU makers and labs already using it.

Iceberg Maps Its qLDPC Architecture Onto Diraq’s Spin Qubits

The headline result comes from Iceberg Quantum, which used CUDA-Q Logical to model its Pinnacle error-correction architecture on Diraq’s silicon spin-qubit hardware. Pinnacle is a quantum low-density parity-check (qLDPC) code, a family that promises far lower overhead than the surface code but is usually assumed to demand more complex hardware. Diraq’s write-up says the modeling showed Pinnacle can run on its hardware without asking much more of the platform than a surface-code approach would, with non-local connectivity confined to modular processing blocks and qubit shuttling schedules tuned so shuttling contributes no more to the error budget than physical gates. The hardware-aware physical qubit counts landed within 5% of the figures in the original Pinnacle paper, which is how the two companies arrive at 1,000 logical qubits from 150,000 physical ones, the figure Diraq now reports in its “The Case for Silicon” white paper and roughly 10x below its earlier estimate. Diraq CEO Andrew Dzurak called it an order-of-magnitude increase in the projected logical performance of each device.

Fermilab Cuts Development Time From Five Months to Three Weeks

Fermilab used CUDA-Q Logical in early work to validate prior results and evaluate physical qubit requirements, runtimes, and other resources across different error-correction approaches and hardware. The lab says that turned fault-tolerant system design into a repeatable, verifiable computational workflow and compressed algorithm development from five months to three weeks, a 7x speedup. “Using CUDA-Q Logical, our team explored combinations of these resources in just three weeks, compared with what would have typically taken about five months of building specialized infrastructure,” said Anna Grassellino, chief technology officer at Fermilab and director of the Superconducting Quantum Materials and Systems Center.

Sandia’s QUOPS Benchmark Ships in CUDA-Q

Alongside the orchestration layer, NVIDIA is shipping a reference implementation of QUOPS, a cross-platform, hardware-agnostic benchmark from Sandia National Laboratories that measures progress toward utility-scale, fault-tolerant quantum computing. The field has mostly tracked itself through physical-qubit metrics such as qubit count, gate fidelity, and coherence time; QUOPS is meant to score how close a system is to running useful workloads. Sandia posted a preprint ahead of IEEE Quantum Week with initial QUOPS results for QPUs from Google, IBM, and Quantinuum. “We created QUOPS to do exactly that, and we’re excited to see it used by quantum computing vendors and customers,” said Timothy Proctor, co-director of Sandia’s Quantum Performance Laboratory, referring to the need to track and forecast the growth of quantum computer capabilities.

The Rest of the Quantum-GPU Stack

The same announcement rounds up adoption across NVIDIA’s quantum lineup. Diraq used NVIDIA Ising, which NVIDIA calls the first family of open models for building and deploying AI for useful quantum computing, to calibrate its silicon qubit processor. Anyon Computing, Quandela, and Quantum Machines each built on NVQLink, NVIDIA’s open architecture for coupling QPUs to GPU supercomputers, with Quantum Machines running an integration demo at the Israeli Quantum Computing Center. IonQ reported progress on DQAOA-GPT, a quantum generative AI framework; MITRE published work on GPU-accelerated digital twins of quantum sensors; Phasecraft is using cuQuantum to build what it describes as the largest emulated molecular database generated by a variational quantum eigensolver, and UCLA and Caltech are working on the control sequences needed to run quantum applications.

The timing puts NVIDIA’s software layer in the same conversation as the hardware roadmaps we’ve been tracking, including IBM’s path to a fault-tolerant machine in 2029 and the 120-qubit Nighthawk r2 headed to CSCS. CUDA-Q Logical is available now on GitHub, and the QUOPS reference implementation ships in CUDA-Q, with Sandia’s benchmark repository published separately.

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Axelera AI is shipping Europa, the second-generation AI Processing Unit (AIPU) it has been previewing since last year, and it’s launching with validated servers from Dell and Supermicro attached. The Eindhoven company’s pitch is inference on infrastructure the customer controls: agentic systems, vision-language models, generative AI, and computer vision running in a standard rackmount server on premises, for the financial services, healthcare, legal, defense, and government buyers whose compliance or sovereignty rules keep them off public cloud AI. Europa comes three ways: as a bare chip for customers designing their own boards, as the half-height, half-length Axelera Edge 232p PCIe card, and as the full-height, full-length Axelera Server 250p.

629 TOPS at 45W, With the Pre- and Post-Processing On Board

Europa’s headline number, from Axelera’s product page, is 629 TOPS at INT4, INT8, or INT16 inside a 45W TDP, from eight second-generation AI processing cores, double the count in the first-generation Metis part. Alongside them sit 16 RISC-V vector cores that handle pre- and post-processing on the chip, so the host CPU stays free for application logic, plus an onboard video decoder that keeps vision pipelines from bouncing frames through system memory. Memory is 128MB of L2 SRAM backed by 200GB/s of DRAM bandwidth, and the silicon is built on Samsung’s 5nm process. Axelera’s comparison charts claim 3x to 5x performance per dollar and 2x to 3x performance per watt against unnamed competitors on Llama 3 8B, Llama 3 70B, and Llama 3.2 11B Vision, with the four-chip configuration doing most of the winning; those figures combine Axelera internal testing with competitors’ published NIM benchmark data.

The card photos tell you how the two form factors divide the work. With the heatsink off, the Server 250p carries four Europa AIPUs in a row along a full-length board, which lines up with the “Europa 4Chip” column in Axelera’s charts, while the Edge 232p mounts a single AIPU on a half-length board. Both are standard PCIe cards that Axelera says drop into existing servers without rebuilding the environment around a new platform, and the Edge 232p is the one shipping in validated systems today: Dell’s XE5 and Supermicro’s 111AD, which join a list of validated OEM platforms from Advantech, Axiomtek, HPE, Lenovo, and Seco, with more to be announced. “We built our architecture around some of the hardest constraints in computing: power, energy, cost and the need to process data locally,” said Fabrizio Del Maffeo, CEO and co-founder of Axelera AI. “Europa applies those same principles, expanding from Physical to Enterprise AI, giving organizations the performance they need for increasingly sophisticated workloads while keeping control of their data, infrastructure and economics.”

One Toolchain From Metis to Europa

The software side is the Voyager Toolchain, which compiles and optimizes existing models for every Axelera part from the embedded Metis modules up to the Server 250p, using YAML pipeline definitions so a vision or language application built on Metis moves to Europa without a rewrite. On top of it sits Voyager Wingman, the agentic development layer Axelera introduced in July that ports existing inference pipelines, builds new ones, and optimizes code. The newest piece is AxeleraScript (AxScript), the model compilation approach Axelera disclosed last week to widen model support, which the company calls out as the limiting factor for many customers and silicon vendors alike.

Del Maffeo delivers a keynote titled “The Physical AI Inflection Point: Industry Shifts, Adoption Barriers, and the Infrastructure Imperative” at 11:00 a.m. local time today at AI Infra Summit in Santa Clara, the same show where Lightbits is debuting its Inferra KV cache engine, and Europa is running at booth 930. Axelera says it has deployed across more than 600 customers to date; Europa is the part that has to prove the same edge-first design holds up when the workload is a 70B-parameter model serving multiple users from one server.

Axelera AI Europa

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CTERA has published The Cold Data Storage Report, an analysis of 16 petabytes of live production data across 856 file-share discovery scans in enterprise NAS environments, including regulated industries, and the headline number is that just 4.4% of stored capacity is actively used, which the report page defines as modified within a 90-day window. The rest is cold: 83.1% of total capacity sits in files that haven’t been modified in more than a year, 97.5% of individual files haven’t been modified in that time, 88% haven’t been accessed in more than a year, and only 9.9% of stored data was touched in any given 90-day window. CTERA’s framing is that enterprises are running their most expensive storage tier as a de facto archive, and that the bill for it shows up three places: cost, security exposure, and the quality of what AI systems retrieve.

Primary Storage as an Accidental Archive

None of this is a new problem; IT has had the ROT acronym (redundant, obsolete, or trivial) for years. What the report puts numbers on is the multiplier. Cold files on a primary array consume flash or hybrid capacity and then ride along through every backup pass, snapshot, and replication job that protects the tier, so the resources needed to maintain the estate scale with data nobody is reading. “When only 4.4% of capacity is actively used, enterprises are running their most expensive storage tier as what is effectively a cold archive. That creates a multiplier effect across storage and data protection costs, security exposure, and now the quality of information available to AI systems,” said Aron Brand, CTO of CTERA. His prescription is placement: “The answer isn’t simply to delete old data; it’s to make better decisions about where that data belongs. Information can be retained and protected without living on expensive primary storage.” That’s the same demand signal behind the archive-tier growth we saw in LTO shipments this year.

Security Exposure and AI Retrieval Quality

Inactive data typically stays in the same network-accessible shares, under the same access rights, as the data people use every day, so users and applications can reach far more information than daily operations require. Moving that data off the live tier shrinks the amount of sensitive material exposed in file systems without changing what’s retained.

The AI-readiness point is newer. As organizations point retrieval and search tools at their file estates, large volumes of historical or superseded material compete with current documents for relevance, and a model is only as reliable as what it retrieves. CTERA has been building toward this for a while; its n8n integration exposes file data to AI workflows, and its Fusion Direct targets files and objects for AI pipelines, and the report reads as the case for cleaning up the corpus before those pipelines index it. The full report is available from CTERA behind a registration form.

The Cold Data Storage Report

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Fujitsu is bringing its 2nm FUJITSU-MONAKA processor to AI infrastructure with a new server family designed to run AI inference in air-cooled data centers without requiring specialized liquid cooling. The MONAKA Server is designed, developed, and manufactured in Japan, with component and manufacturing traceability for sovereign AI deployments.

The first MONAKA Servers will come in 1U and 2U configurations for AI inference and AI agents, with a separate 2U multi-node system planned for academic and HPC environments. Fujitsu is also making the MONAKA processor available separately for cloud and data center operators and other server vendors.

MONAKA runs at up to 3.8GHz and supports memory transfer speeds up to 8800MT/s, with dedicated matrix instructions and SVE2 vector processing accelerating AI inference directly on the CPU. Fujitsu rates MONAKA at twice the AI inference throughput of other CPUs, although it hasn’t identified the processors used for that comparison or provided benchmark results.

MONAKA Brings AI Inference to Air-Cooled Servers

The 1U MONAKA Server supports air cooling at ambient temperatures up to 40 degrees Celsius, while its liquid-cooled configuration supports water temperatures up to 45 degrees Celsius.

Fujitsu rates its server cooling technology for up to an 80% reduction in cooling power consumption, although specific system configurations and test conditions weren’t provided. The air-cooled configuration is particularly interesting for data centers that want to add AI inference capacity without changing their existing cooling infrastructure.

The processor itself uses a 3D-stacked design that combines CPU cores manufactured on a 2nm process with cache and I/O produced at 5nm. Fujitsu pairs the design with its ultra-low-voltage operation technology, which is where it says the power efficiency comes from.

Confidential computing is implemented at the hardware level through Arm CCA, encrypting applications and data while they are running in memory, including workloads operating in multi-tenant cloud environments.

MONAKA is also being developed for integration with accelerated platforms through Fujitsu’s work with NVIDIA to connect MONAKA CPUs and NVIDIA GPUs through NVLink Fusion.

MONAKA Server Keeps Development and Manufacturing in Japan

Sovereign infrastructure is the other major focus for MONAKA Server, with Fujitsu keeping the design, development, and manufacturing of the systems in Japan. Production will take place at the company’s Kasashima Plant, where component origins and manufacturing histories can be tracked through the production process.

That traceability takes the sovereign AI pitch down to the physical hardware, past the usual question of where data is stored or processed. Fujitsu is pairing the domestically produced hardware with its own AI software and management technologies for organizations that need greater control over their infrastructure, data, and supply chain.

The initial server lineup includes a 2U system with two MONAKA processors and 1U configurations with either one or two CPUs. Both air- and water-cooled deployments are supported, with the systems targeting AI inference and AI agent workloads.

Specification		2U Rackmount Model	1U Rackmount Model
Features		All-in-one CPU/GPU/NW model optimized for existing DC/Edge environments	Scalable model with flexible configuration and expansion according to environmental changes
Applications		Digital Twin, Physical AI, Agentic AI, AI Inference	Optimized for facility environments; flexible expansion from small to large scale
CPU	Type / Quantity	FUJITSU-MONAKA 2 CPUs	FUJITSU-MONAKA 1 to 2 CPUs
	Base Frequency / Cores	2.1GHz × 144 cores	2.1GHz × 144 cores (air-cooled) 2.9GHz × 144 cores (liquid-cooled)
Memory Type / Slots		RDIMM 24	RDIMM 12 (1-CPU configuration) / 24 (2-CPU configuration)
Storage Type / Slots		E3.S SSD × 4 M.2 SSD × 2	E3.S SSD × 8 M.2 SSD × 2
Expansion Slots		PCIe Gen6 (GPU support available)	PCIe Gen6
Chassis Size		2U height	1U height
Cooling Method		Air-cooled	Air-cooled / Liquid-cooled

 

The 1U MONAKA Server also uses CDI/CXL technology to pool memory and accelerators, allowing those resources to be allocated across systems.

For academic and HPC environments, Fujitsu is preparing a 2U multi-node MONAKA Server with four nodes and two CPUs per node. The configuration is intended for computational workloads including surrogate models and fluid analysis.

Specification		2U Multi-node Model (4 nodes per chassis)
Features		Multi-node model maximizing processing power within limited power and space
Applications		AI data centers, large-scale simulations
CPU	Type / Quantity	FUJITSU-MONAKA 2 CPUs per node / 8 CPUs per chassis
	Base Frequency / Cores	2.9GHz × 144 cores
Memory Type / Slots		RDIMM 24 per node / 96 per chassis
Storage Type / Slots		E1.S SSD × 2 per node M.2 SSD × 2 per node
Expansion Slots		PCIe Gen6
Chassis Size		2U height
Cooling Method		Liquid-cooled

Fujitsu Connects MONAKA With Its AI Software

Fujitsu is extending the sovereign infrastructure approach into software through the Fujitsu Kozuchi AI platform, Takane enterprise generative AI, and industry-specific AI models. The combination brings together the processor, server hardware, AI platform, and generative AI software while supporting domestic data management, governance, traceability, security, and operational autonomy.

Future MONAKA hardware will include higher-density systems for AI data centers and rack-scale servers with autonomous operation features. Fujitsu is also developing robotic maintenance technology for future rack-scale systems, extending automation into physical server operations and maintenance.

Fujitsu’s math on the twice-the-throughput claim is that customers need half the servers and half the power for the same inference load, which is the figure the air-cooled pitch rests on. With no named comparison CPU or published benchmarks behind it, that’s the number to test when systems ship.

FUJITSU-MONAKA Availability

Standalone FUJITSU-MONAKA processors are scheduled to go on sale in November 2026, with availability planned for cloud and data center operators and server vendors in Japan, the US, APAC, and other markets during the fourth quarter of Fujitsu’s fiscal 2026.

Fujitsu also plans to begin sales of its 1U and 2U MONAKA Servers in Japan and Europe in November 2026 to data center operators, enterprises, academic and HPC buyers, and the defense sector. Select customers in the financial, telecommunications, and manufacturing sectors are expected to receive systems during the second half of fiscal 2026, with broader shipments in Japan and Europe scheduled to begin sequentially in April 2027.

FUJITSU-MONAKA

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FS has organized its AI optics into a two-part portfolio: Scale-Out transceivers at 400G, 800G, and 1.6T for the links inside a GPU cluster, and Scale-Across coherent modules at 400G and 800G for stitching clusters together across sites at distances up to 500 km. The Scale-Out side covers Ethernet, RoCE, and InfiniBand fabrics between GPU servers, NICs, switches, and racks; the Scale-Across side ships in OSFP and QSFP-DD for data center interconnect. Alongside both, FS is positioning the BOX 5 Ultra, a handheld toolkit for configuring, validating, and monitoring transceivers from 100M to 1.6T without a switch in the loop. The announcement is a packaging of parts FS has released one at a time since December, so the useful view is how they line up.

1.6T at the Top of the Scale-Out Stack

The 1.6T parts are the OSFP-DR8-1.6T and OSFP-2FR4-1.6T, twin-port OSFP modules with a closed finned top that FS introduced for InfiniBand XDR networks. Both take 8x 200G PAM4 on the electrical side and run a Broadcom 3nm DSP. The DR8 uses silicon photonics with a CW laser, drives dual 4x 200G optical lanes at 1310nm over dual MTP/MPO-12 connectors, reaches 500 meters, and tops out at 25W; the 2FR4 uses EML transmitters and CWDM4 wavelengths over dual duplex LC, reaches 2 km, and draws up to 26W. FS says the modules are 100% verified on NVIDIA Quantum-X800 switches and lists NVIDIA part numbers (MMS4A00 and MMS4A50-XM) they’re built to match, with the DR8 aimed at 1.6T switch-to-switch links and 1.6T-to-two-800G breakouts into DGX B300 systems. That puts FS in the same 200G-per-lane generation the hyperscalers are buying into, whether through Qualcomm’s 1.6T interconnect deal with Amazon or the startup optics Lumilens is already shipping, at the compatible-module end of the market where FS competes on price and availability.

The form factor detail matters more at 1.6T than it did at 400G. FS’s diagram shows the three OSFP tops it sells: the closed-finned top and the open-finned top both stand about 13mm and are meant for air-cooled switch cages (the closed version also works in liquid-cooled systems), while the flat top at roughly 9.5mm is for NICs with cage-riding heatsinks or liquid-cooled gear. The release says the 400G-to-1.6T lineup spans multiple form factors to match specific accelerator platforms, and that’s the choice it’s referring to: the same optics in the shape a given switch or NIC can cool.

800G Coherent for Scale-Across, and the Muxponder Behind It

The Scale-Across modules are the 800G ZR/ZR+ coherent optics FS launched in July, in OSFP and QSFP-DD, built on a Marvell 5nm DSP. FS rates them for 120 km and 500 km over single-mode fiber depending on the line, supports C-band and L-band operation to get more out of a fiber pair, and lists compliance with the OSFP and QSFP-DD MSAs plus 800ZR, OpenZR+, and OIF specifications, with Open FEC and CMIS/C-CMIS management. The 500 km figure in this week’s announcement is that July spec, restated with the caveat that reach depends on network configuration and optical line conditions.

For sites that aggregate client traffic before it reaches the line side, FS added the D7070 Series muxponder in August: a 1U box that takes 100GbE and 400GbE client services on QSFP28 and QSFP112 and puts them onto four 800G coherent wavelengths through CFP2-DCO line pluggables, for 3.2 Tb/s per platform, with WebGUI and CLI management for third-party NMS integration. “As AI and cloud workloads accelerate inter-site traffic growth, customers need DCI networks that can scale with demand while maximizing existing infrastructure,” said Bener Peng, product R&D manager at FS, when the D7070 launched.

BOX 5 Ultra: Provisioning Optics Without a Switch

The FS BOX 5 Ultra is the operations piece. It’s a portable transceiver toolkit that handles data rates from 100M to 1.6T across 15 form factors, OSFP, QSFP-DD, QSFP112, SFP-DD, and SFP among them, and FS says it works with modules from more than 200 brands. The functions are transceiver configuration, compatibility validation, module information reading, DDM monitoring, batch management, and wavelength tuning for tunable DWDM modules; the product page adds cloud batch coding, database access for easy config, and a 3,200mAh battery FS rates at up to 8 hours. The pitch is that a field tech can code, verify, and tune a tray of optics on a bench before any of them touch a production cage, which is the kind of work that otherwise eats switch ports and change windows.

FS hasn’t published module-level power or reach for every SKU in the 400G and 800G Scale-Out range in this announcement, and the 1.6T figures above come from the December launch of those specific parts. “The evolution from 800G to 1.6T is not only about higher speed but also about reshaping the optical interconnect architecture for AI,” said Kyrie Zhang, senior product manager at FS, at that launch, and the September portfolio is the company drawing the map around it.

FS AI Optical Transceivers

The post FS Pairs 1.6T Scale-Out Optics With 500 km Coherent Modules and a Handheld Toolkit for AI Fabrics appeared first on StorageReview.com.

Two weeks from now (September 28 through October 1, opening with a reception on the 28th), we’ll be in Milwaukee, Wisconsin, for EUC World Amplify 2026. In a previous article, we shared why we’re excited to go. Building on that, we asked five EUC World Amplify 2026 sponsors, 10ZiG, Nevona.ai, Leostream, Nerdio, and Tassient, why they’re traveling to Milwaukee to back the event.

Each company offered a different perspective on why it’s sponsoring and what it plans to show, but they all see Amplify as a chance to connect directly with EUC practitioners, trade real-world experiences, talk through the rapid changes reshaping the industry, and get honest feedback from the people working with EUC every day.

10ZiG Technology

“We’re attending and sponsoring EUC World Amplify because we believe some of the most valuable conversations in EUC happen when you bring together the people who actually design, deploy, and support these environments in one place. The EUC landscape is changing quickly, and IT Teams are having to navigate new challenges, such as vendor acquisitions, increased licensing costs, product end-of-life, security requirements, and evolving approaches to delivering apps, desktops, data, and digital workspaces, not forgetting the endpoints they are delivered on. Amplify creates an environment where those experiences can be shared openly and, technically, without everything becoming a sales pitch.

For 10ZiG, supporting that kind of community is important, as many new EUC friendships are formed in environments like this. We want to be part of the technical discussion, learn directly from the engineers dealing with these challenges every day, share what we’re seeing across different environments, and hopefully contribute some useful experiences of our own. That’s why we’re not just attending EUC World Amplify; we’re proud to be a Founding Sponsor and help support the EUC community behind it.”

Tom Dodds  – Global Strategic Alliances & Events Manager, 10ZiG Technology

Nevona.ai

“We come to Amplify for the people in the room who care about the same problems we do – the EUC work this audience fights every week, and that we lived ourselves for years at ControlUp: a Workspace client update that kills audio in a delivery group, a Citrix-to-AVD/LAS migration that stalls, FSLogix profiles bloating, a Patch Tuesday that breaks logon at 6am, GPO and baseline drift nobody has time to reconcile. That work doesn’t need another dashboard or another chat window. It needs something that can reach across the endpoint, the broker, AD, and Intune, find the root cause, and actually do the work.

Nevona is building autonomous agents that take that on end-to-end within your environment, not just the L1/L2 tickets. The migrations, the patch-and-regression recovery, the drift and identity cleanup, the standing engineering projects that never reach the top of the queue: the aim is an AI layer that operates IT the way your best engineers would, with the audit trail and guardrails to run unattended and safely. We’re here because this is the crowd that will tell us – bluntly – whether we got it right. Come find the team and put it to the test.”

Amir Harel – Co-founder & CEO, Nevona.ai

Leostream

“We are excited to sponsor an event driven by our peers and colleagues!

In the past, Leostream has been a bit of an outlier in the EUC market, but a lot has changed. Vendor consolidation, product changes, and shifting technology strategies have made flexibility and future-proofing more relevant than ever.

We’re looking forward to some interesting conversations and technical discussions at Amplify and the opportunity to showcase how our solution fits into this rapidly changing environment.”

Karen Gondoly – CEO, Leostream

Nerdio

“We’re living through the Great Migration in end-user computing, the largest replatforming this industry has seen since the shift from physical desktops to VDI. Organizations everywhere are moving off legacy VDI platforms and rethinking where their workloads should live: in the cloud, hybrid, on-premises, and, increasingly, in environments built for AI agents alongside human users.

I’ve spent my career building the platforms that underpin this shift, and I can tell you the hardest problems are solved by practitioners. We’re coming to Milwaukee to learn how this community of experts is navigating the shift as much as to share what we’re seeing, and the EUC community has always been generous with hard-earned knowledge. At a moment when nearly the entire market is rethinking its endpoint strategy, that collective knowledge is the most valuable asset this industry has.”

Scott Manchester – Chief Product and Technology Officer, Nerdio

Tassient

“As a disruptive new entrant in the EUC space, we are always looking for venues to present, demonstrate, and discuss our flagship product, Aipex, to a highly technical audience. After speaking with EUC practitioners who have attended previous Amplify events, we felt they were exactly the kind of audience we wanted to reach. Aipex is an AI-first remote monitoring, management, and remediation tool. In addition to a first-class set of human-driven troubleshooting tools, it allows IT administrators to use natural language with our Agentic AI Assistant to troubleshoot and, more importantly, remediate issues. We needed a place to connect with EUC administrators, and we felt that Amplify gave us exactly that.”

Jon Rolls – Founder and CEO, Tassient

We put Aipex through its paces earlier this year in our Tassient Aipex review.

Closing Thoughts

If you want to have technical discussions with fellow EUC practitioners and vendors, we highly recommend heading to Milwaukee and attending Amplify Sept. 28 to Oct. 1. We look forward to seeing you at the Baird Conference Center.

EUC World Amplify 2026

The post Why Five EUC World Amplify 2026 Sponsors Are Betting on Milwaukee: 10ZiG, Nevona, Leostream, Nerdio, and Tassient appeared first on StorageReview.com.

IBM and NASA have released the NASA-IBM Lunar Foundation Model as open source, one of the first publicly available foundation models built for scientific study of the Moon. The weights, a technical report, and the machine-learning-ready dataset it was trained on are up on Hugging Face under the Prithvi family, which already covers Earth observation, weather, and heliophysics. The pitch is that decades of multi-instrument lunar data have outgrown hand-sifted maps and narrow, task-specific models, and a single pretrained backbone can be adapted to crater mapping, volcanic-feature detection, and ice prospecting without starting over each time. In IBM and NASA’s own benchmarks, the model cut root-mean-square error in flagging likely ice deposits by up to 22% against a SwinV2-B baseline.

A TerraMind Backbone on 30 Layers From Nine Instruments

The model is built on a version of TerraMind, the Earth-observation model IBM developed with the European Space Agency, chosen for how it handles mixed data types and resolutions and learns cross-modal correlations that can fill in missing or noisy values. Fine-tuning for each lunar task uses low-rank adapters that keep 90% of the base weights frozen, which is what keeps the adaptation cost low. The training corpus is the part NASA says didn’t exist before: a unified, spatially aligned dataset of more than 30 layers from nine instruments across four missions, on the order of 2 million image tiles, with more than 1 million 1-meter camera images and close to 964,000 multispectral images at 100-meter resolution. Sources include imagery from NASA’s Lunar Reconnaissance Orbiter, gravity-field maps from the GRAIL mission at 20 kilometers per pixel, Lunar Prospector data, and complementary observations from JAXA’s SELENE/Kaguya. The benchmark collection, called SOMBench, ships alongside the model.

Ice, Volcanic Patches, and Craters at Two Scales

The 22% figure comes from the ice task, where the model combines multimodal, multi-resolution observations to predict where ice may sit below the surface of permanently shadowed regions, the places a future Moon base would mine for water, oxygen, and rocket propellant. For volcanic history, it maps Irregular Mare Patches with 3% better coverage than SwinV2-B while training on imperfect labels, which IBM frames as comparable accuracy at lower fine-tuning cost. Crater detection splits by scale: at meter-scale resolution the model matches SwinV2-B, and at roughly 100-meter context scale it outperforms it by nearly 19% with half the training data. Michael Barker, the NASA lunar topography expert who co-led the project, said the payoff is in features whose ages are still contested: “The ages of these features remain a matter of great debate, so the more we can understand their distribution and properties, the better chance we have of resolving this mystery.”

“NASA has spent decades building an extraordinary scientific record of the Moon, but collecting data is only part of the job. We also have to make data easier for scientists to explore and use,” said Kevin Murphy, chief science data officer and acting chief data and AI officer at NASA Headquarters. Juan Bernabe-Moreno, director of IBM Research Europe, UK and Ireland, said the model “gives scientists a foundation to explore the Moon at scale, connecting observations across instruments, revealing patterns that are difficult to see in isolation, and providing an open platform the global research community can build on.”

Everything is available now under an open-source license, and IBM’s research blog walks through the three initial NASA use cases in more depth. It’s the same open-weights playbook IBM has run on the enterprise side with Granite 4.0, applied here to a science domain where the scarce resource is labeled data and the compute to fine-tune against it, and the immediate consumers are landing-site hazard analysis and resource prospecting for a sustained lunar presence.

NASA-IBM Lunar Foundation Model

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Lightbits Labs, the company that invented NVMe over TCP, is moving into inference software with Inferra, a KV cache orchestration engine that makes its public debut tomorrow, September 15, at the AI Infra Summit in Santa Clara. The software virtualizes GPU memory across DRAM and NVMe storage tiers and turns the KV cache into a persistent data layer, so attention states for long-context and multi-session workloads don’t have to fit in HBM or be recomputed when they fall out. Lightbits claims up to 16x more concurrent inference sessions on existing GPUs, a greater than 100x latency improvement from prefetching attention states in place of recomputing them, and context windows up to 10 million tokens, and says the engine has already run in customer beta programs, including one with OVH.

Prefetch Instead of Recompute

The bottleneck Inferra targets is the one we walked through in our KV cache offload to flash piece: as context lengths grow and sessions multiply, the KV cache outgrows GPU memory, and the serving stack either evicts it and recomputes the prefill later or caps how many sessions a GPU can hold. Both paths burn GPU cycles on work that has already been done. Inferra keeps the cache alive across memory and storage tiers, and a predictive prefetcher pulls attention states back toward the GPU ahead of when the model needs them. Lightbits says that approach drives down both Time-to-First-Token (TTFT) and Time Per Output Token (TPOT), and the 100x figure it quotes is the latency improvement against recomputing those states from scratch.

Lightbits’ block diagram lays out the four pieces: an intelligent prefetcher, a tiering manager, a log-structured KV store, and security and isolation engines, sitting between the serving framework above and a standard NVMe SSD pool below. The company lists vLLM, TensorRT, and SGLang as supported serving frameworks and says the engine is GPU-and SSD-agnostic. The log-structured store is what makes a flash tier practical for a cache that changes constantly, since it appends updates sequentially and keeps small random writes off the drives, and we looked at how a 3 DWPD drive holds up in that role in our Solidigm D7-PS1030 review. On the multi-tenant side, Lightbits describes secure tenant isolation and intelligent cache management across shared inference infrastructure, with encrypted transfer between tiers, which is what lets a neocloud hand one KV pool to many customers with consistent SLAs.

Avigdor Willenz, co-founder and chairman of Lightbits Labs, framed the launch as a break from storage built for training pipelines. Inference “is a completely different paradigm,” he said, and “retrofitting legacy training and storage systems to solve the KV cache bottleneck simply doesn’t work. It was built for a different era. We engineered Inferra from the ground up specifically to solve the GPU efficiency problem, and it has already proven successful in customer beta programs.”

OVH, Solidigm, and the Booth 219 Demos

OVH is the named beta customer. “With Inferra’s intelligent KV cache tiering, we were able to demonstrate substantial GPU utilization gains, paving the way to providing our customers a more scalable and cost-effective foundation for their AI agent and RAG workloads,” said Yaniv Fdida, chief product and technology officer at OVH. Solidigm ran the engine in its AI Central Lab on D7-PS1010 drives, and Avi Shetty, the company’s VP of ecosystem, solutions, and market enablement, said the results “showcased how network-attached storage with intelligent software layer virtualization can break through the memory wall for large context, agentic AI.” That pairing of a network-attached NVMe pool with a software tier is Lightbits’ home turf; its LightOS block storage has been built on NVMe/TCP since 2019.

Ramesh Chettuvetty, senior vice president of AI product and business at Lightbits, called Inferra “the world’s first KV cache acceleration engine that eliminates idle GPUs and power context windows of up to 10M tokens on commodity hardware,” and said it “delivers instant payback and generates net positive savings from day one.” Those are vendor claims ahead of any independent testing, and the release doesn’t give pricing, packaging, or a general availability date; the engine is in customer beta today. Lightbits is running live demos of the session-density and latency results at Booth 219 during the summit, and has posted a Pod Efficiency Analyzer for teams that want to model the GPU savings against their own cluster before booking one.

Inferra by Lightbits

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AWS has made second-generation single-rack AWS Outposts generally available, a self-contained 42U rack that puts compute, storage, and networking together with up to 2,688 vCPUs and 100 TB of Amazon EBS. It runs the same APIs, console, automation, governance policies, and security controls as the multi-rack second-generation Outposts and the parent AWS Region, so an application built for the cloud moves on-premises without issue. AWS is suggesting this configuration is best for sites that need low latency, local data processing, or data residency but don’t have the floor space for a multi-rack deployment.

The Second Generation, Folded Into One Cabinet

AWS launched its second-generation Outposts racks in April 2025 as a multi-rack design that lets customers scale compute independently of a dedicated network rack. The single-rack version keeps that generation’s instances and networking and collapses them into a single 42U footprint, which is the point for customers who couldn’t justify or fit the multi-rack layout. Until now, the small end of the Outposts line was the 1U and 2U Outposts servers, which run on local instance storage and don’t offer EBS.

On the compute side, AWS supports the 7th-generation C7i, M7i, and R7i families on 4th Gen Intel Xeon Scalable processors, which the company says deliver twice the vCPU, memory, and network bandwidth of the first-generation racks and up to 40 percent better performance than the C5, M5, and R5 instances they replace, and AWS supports the newer 8th-generation C8i, M8i, and R8i families as well. EBS gp3 volumes have been available on second-generation racks since June 2025.

Accelerated Networking for Trading Floors and 5G Cores

The differentiator in the second generation is the pair of bare-metal accelerated networking instances. The bmn-sf2e instances pair Sapphire Rapids CPUs with AMD Solarflare X2522 network cards, in two sizes: bmn-sf2e.metal-16xl with 64 vCPUs, 512 GiB of DDR5, and two accelerated NICs at 100 Gbps, and bmn-sf2e.metal-32xl with 128 vCPUs, 1,024 GiB, and four accelerated NICs at 200 Gbps. AWS built them for capital markets, with native Layer 2 multicast, precision time protocol, and equal cable lengths so firms can meet fair-trading and equal-access rules on premises while plugging into existing trading infrastructure.

The bmn-cx2.metal-48xl carries 192 vCPUs, 1,024 GiB of DDR5, and two NVIDIA ConnectX-7 400G NICs for 800 Gbps aggregate, with the same L2 multicast and hardware PTP support, targeted toward real-time market data distribution, risk analytics, and telecom 5G core workloads. A third family, bmn-cx3a, appears in the single-rack instance list without a published spec.

Availability

Single-rack second-generation Outposts can be ordered now from the AWS Outposts console, with the list of supported countries and territories on the Outposts rack FAQ page. The storage ecosystem that grew up around the first generation carries over: Dell’s PowerStore and Pure’s FlashArray are both validated as external block storage for Outposts, which matters for sites that outgrow the 100 TB of EBS inside the rack.

AWS Outposts Rack

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LTM, the Larsen & Toubro Group services company that was LTIMindtree until its February rebrand, is building a Lightwell remediation services practice around the $5 billion IBM and Red Hat program for securing open-source software with AI-generated, vendor-validated fixes. IBM’s clearinghouse produces validated, production-ready patches for open-source dependencies; LTM’s job is getting them into customer environments. The company says its planned portfolio spans remediation strategy, dependency analysis, risk-based prioritization, remediation program management, DevSecOps integration, testing and validation, and large-scale deployment support.

Where LTM Fits in the Lightwell Model

Lightwell’s premise, as IBM and Red Hat laid it out in May, is that AI is accelerating vulnerability discovery faster than enterprises can remediate, so a clearinghouse staffed by more than 20,000 engineers ingests vulnerability data from live deployments, validates fixes, and ships them as production-ready patches through subscription services. In July, the two companies added a Lightwell Network tier, which is generally available with a library of remediations spanning current and legacy libraries, and a Lightwell Clearinghouse Premier tier in limited-availability commercial onboarding, and named a bench of deployment partners that included LTM alongside Accenture, Deloitte, HCLTech, Infosys, Kyndryl, TCS, and others. This week’s announcement turns LTM’s spot on that list into a defined offering, backed by its standing as an IBM Platinum Partner.

“As AI accelerates software development and vulnerability discovery, enterprises need a faster and more scalable approach to remediation,” said Chandan Pani, chief information security officer at LTM. “Lightwell represents a significant advancement in securing the open-source software supply chain by bringing AI-driven remediation and trusted software maintenance into the enterprise. Through our collaboration with IBM, LTM will help organisations strengthen their cyber resilience at scale.” Sandip Patel, managing director of IBM India and South Asia, framed it as collective defense: “As AI accelerates vulnerability discovery, collaboration across the ecosystem becomes increasingly important. Bringing LTM’s engineering and transformation expertise to Lightwell can help enterprises mitigate risk and build more resilient software supply chains.”

Why IBM and Red Hat Want the Integrators

Red Hat’s Ryan King, vice president of AI and infrastructure partners, was the most direct about why the program needs a partner channel at all: “AI-driven discovery has pressed the demand for speed and patch delivery far beyond the means of any one single vendor.” A validated patch from the clearinghouse still has to be prioritized against a customer’s actual dependency graph, tested in that customer’s pipelines, and rolled out across an estate without taking down the applications it protects, and that’s the work LTM says it’ll take on, with the stated goal of heading off zero-day exploits and production downtime.

LTM describes the portfolio as planned, and the release carries no pricing, availability dates, or named customers, so this is a go-to-market announcement for services that are being built around Lightwell’s existing tiers. What it does signal is that Lightwell’s financial-services early adopters, which included Bank of America, Citi, Goldman Sachs, JPMorganChase, and Visa at launch, will be followed by a wider enterprise base that reaches the program through integrators like LTM, and we’ll be watching for the first deployment specifics.

IBM Lightwell

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IBM and Lockheed Martin are setting up a quantum innovation hub at ETH Zurich, and its core is Switzerland’s first IBM Quantum System Two, to be installed at the Swiss National Supercomputing Centre (CSCS) in Lugano by the end of 2026. The hub comes out of an offset agreement with armasuisse, Switzerland’s Federal Office for Defence Procurement. IBM will operate the machine, which runs on an IBM Quantum Nighthawk processor, while ETH Zurich supplies the expertise and coordinates access for Swiss universities, startups, and companies.

A 120-Qubit Nighthawk r2 Next to Alps

The Swiss system will run IBM’s Nighthawk r2, which IBM calls the fastest and most advanced processor it has made available to users. It carries 120 programmable qubits and a new high-speed qubit reset architecture that lets it execute more than 100,000 circuits per second, which IBM puts at up to 25x the circuit throughput of the Heron processors it succeeds. IBM also says the part has already demonstrated accurate computations on quantum circuits containing 7,500 gates. Nighthawk is the processor family IBM has been building its near-term roadmap around, most recently when it linked two cryogenic modules below 15 millikelvin on the way to its 2029 fault-tolerant machine.

CSCS will house the System Two in the same facility as its Alps supercomputer and provide the power, cooling, and security, so the quantum node sits directly alongside national HPC infrastructure for the chemistry, materials science, optimization, and financial services work the hub is targeting. That’s the same quantum-centric supercomputing pattern IBM has been describing with partners like AMD, where a quantum processor handles the parts of a problem classical hardware can’t simulate efficiently, and the supercomputer handles the rest. The IBM and ETH Zurich agreement to install and operate the system runs for an initial three years, through 2029. Until the hardware arrives, organizations joining through ETH Zurich get access to IBM’s cloud-based quantum fleet, and the whole arrangement builds on a 10-year collaboration between IBM and ETH Zurich on the next generation of algorithms for AI and quantum computing.

Lockheed Martin’s Two Projects and the Training Pipeline

The hub formalizes two joint projects between IBM and Lockheed Martin: quantum sensing for navigation, and quantum simulation aimed at improving the additive manufacturing of metallic alloys. “This project extends the strategic relationship between Lockheed Martin and IBM in quantum and AI while positioning Switzerland as a leader in these critical, cutting-edge fields,” said Dr. Craig Martell, vice president and chief technology officer at Lockheed Martin. Alessandro Curioni, vice president of algorithms and applications at IBM Research and director of the Zurich Research Laboratory, said the goal is “to put world-class quantum hardware, software and expertise directly into the hands of Switzerland’s thriving academic institutions and industries.”

“Switzerland will gain access to essential research infrastructure that will enable us to further advance the exploration of this emerging technology,” said ETH Zurich President Joël Mesot. Alongside the hardware, the Swiss ecosystem gets IBM Quantum Network and IBM Quantum Platform learning offerings, including coursework, certifications, and workshops, plus support for hackathons, conferences, and partner forums. IBM’s Starling roadmap puts a fault-tolerant system in Poughkeepsie by 2029, and installations like the one at CSCS are where the algorithms for that machine get worked out on utility-scale hardware in the meantime.

IBM Quantum Hardware

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Nvidia has its finger in every pie, and sees another year of plenty in its future, Jensen Huang says. But, he insists, its deals are not circular.

Bending Spoons is buying Miro for $1.36 billion, a huge dip in valuation for the workplace collaboration startup, which was valued at $17.5 billion in late 2021.

Palantir and NVIDIA have built a sovereign AI stack for supply chain operations and are running it first inside NVIDIA’s own supply chain, the one that has to line up 1.3 million parts for every Vera Rubin rack. The stack brings NVIDIA Nemotron open models into Palantir Foundry and its Artificial Intelligence Platform (AIP), grounded in the Palantir Ontology, with the aim of giving planners visibility across the chain, surfacing constraints early, and codifying the operational judgment that, to this point, lives in people’s heads. NVIDIA’s deployment starts with materials allocation, the decisions about which parts go where that set how fast a rack moves from wafer to first token.

NVIDIA’s Supply Chain as the First Customer

A rack-scale AI system needs compute, memory, networking, power, cooling, and mechanical parts to arrive together, across thousands of suppliers and a global manufacturing network, and NVIDIA says the Vera Rubin supply chain is twice the size of Grace Blackwell’s. The new stack gives NVIDIA’s supply chain teams what the companies call a shared command center, beginning with allocation decisions, so they can identify constraints earlier, evaluate alternatives faster, and allocate materials based on end-to-end production impact.

“Supply chains are the operating system of the physical economy, and AI factories are among the most complex systems ever built,” said Jensen Huang, founder and CEO of NVIDIA. “From wafers and components to manufacturing, systems and customer delivery, hundreds of companies and trillions of dollars of global economic activity come together to deliver AI infrastructure.” Palantir cofounder and CEO Alex Karp put it more bluntly: “NVIDIA has arguably the most valuable, intricate and complex supply chain in the world.” The two companies first announced their operational AI work together at GTC DC last October; this is that partnership producing a deployed system.

Post-Trained Nemotron, cuOpt, and a Human in the Loop

Palantir customers post-train Nemotron open models on their own operational data inside Foundry and AIP, using NVIDIA NeMo Data Libraries to prepare and augment it. Within AIP, NVIDIA cuOpt handles optimization and scenario planning, so teams can model supply constraints, weigh tradeoffs, and see the operational impact of an allocation decision before making it. The post-trained model recommends actions, explains the tradeoffs, and flags emerging risks, while the supply chain experts keep the final call. Palantir Autopilot, integrated with the NeMo AutoModel and NeMo RL libraries, closes the loop by feeding each recommendation, planner action, and production outcome back into model improvement, which is how the companies say operational knowledge gets preserved instead of lost when people move on.

NVIDIA’s technical write-up of its own deployment gives a sense of how light the model work is. The production model is Nemotron 3.5 Lightning, a 30-billion-parameter mixture-of-experts model with roughly 3 billion parameters active per pass, chosen over the larger Nemotron 3 Ultra for agentic workflows. Post-training used LoRA adapters with the base weights frozen and finished on two B200 GPUs in minutes. On NVIDIA’s internal allocation-decision benchmark, the post-trained Lightning model scored 86.7 percent accuracy, 31.2 points ahead of the untuned Nemotron 3 Ultra and 69.2 points ahead of its own base weights. Those are NVIDIA’s numbers on NVIDIA’s data, but they make the case for the approach: a small open model with the organization’s own decisions trained into it beats a much larger general one on that organization’s problem.

Sovereign by Design

Because the data is NVIDIA’s supply chain, the deployment runs on NVIDIA reference architectures and the jointly developed Palantir Sovereign AI Operating System Reference Architecture, or SAIOS, which Dell Technologies and Cisco support. Proprietary data, model weights, and inference stay inside a single governed environment, and the stack can be deployed on premises with Cisco or Dell, or in colocation and cloud with Rackspace and Nebius. Palantir and NVIDIA say they intend to extend what they learn from NVIDIA’s deployment to customers in agriculture, manufacturing, pharmaceuticals, retail, energy, healthcare, automotive, aerospace, and government, and will show the stack and its industry applications at Palantir’s AIPCon 11.

Palantir AIP

NVIDIA Nemotron

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Backblaze and WEKA have validated their two platforms together for AI pipelines, pairing WEKA NeuralMesh as the performance tier that feeds GPUs with Backblaze B2 Cloud Storage as the capacity tier that holds everything else. The integration, sizing, tuning, and testing are already done, so an AI infrastructure team can deploy a proven two-tier layout without building and qualifying its own. Certification of B2 for NeuralMesh is underway, and both companies say customers can contact either one to get started now.

Two Tiers, One Data Lifecycle

Raw, unstructured data, meaning the training sets, media libraries, and source files, lives in B2. When a dataset becomes part of a performance-sensitive job, it’s made available to NeuralMesh and served to the accelerators from there. Once a checkpoint, an output, or any other asset no longer needs high-performance access, it goes back to B2, where it can be reused in a later run or pulled back if a job has to recover to an earlier stage. The companies frame it as speed where the GPUs are and capacity everywhere else, with the data moving between the two as its access pattern changes.

“AI teams need their GPUs fed and an infrastructure with the performance and capacity to support the full AI data workflow. WEKA has mastered the performance tier. We’ve spent nearly two decades doing the same for capacity storage,” said Gleb Budman, CEO of Backblaze. Nilesh Patel, Chief Strategy Officer at WEKA, described the same pressure from the other direction: “AI workloads are stretching storage in two directions at once. GPUs need microsecond access to data to stay fed, while datasets and checkpoints are growing to exabyte scale. Our collaboration with Backblaze gives customers a validated path to both, without the cost of building and testing that integration themselves.”

Snap-to-Object Tested Against B2

Another interesting piece is NeuralMesh’s Snap-to-Object, which the companies say they’ve tested with Backblaze. Snap-to-Object writes a consistent snapshot of a NeuralMesh file system out to an object store, and with B2 as the target, that store is the same capacity tier the raw data and retired checkpoints already end up in. For a training run, that means a team can revert to a checkpoint or recover saved inference data from B2 without improvising a fix in the middle of the job, and without maintaining a separate destination for snapshots. The economic effect is a cloud object tier behind NeuralMesh that’s priced as capacity, holding the snapshots alongside the data they protect.

Backblaze has been positioning B2 as the capacity layer for AI throughout the year, from the B2 Neo offering for neocloud platforms to its performance benchmarking program, and WEKA gives it a performance-tier partner on the GPU side of that.

Backblaze B2 Cloud Storage

WEKA NeuralMesh

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