DDR6 memory development is reportedly ramping up
Samsung, SK Hynix, and Micron have reportedly initiated the pre-development phase for DDR6 memory substrates. The major memory manufacturers have requested that substrate partners begin designing components based on partial design data, including early specifications for memory thickness, stack-up structures, and wiring, to prepare prototypes for validation.
The report, fromΒ The ElecΒ (viaΒ TechPowerUP), states that this collaboration began recently. The joint development between memory and substrate companies typically starts more than two years before a product's launch.
While the JEDEC standard for DDR6 has not yet been finalised (work on it started in 2024), the race to establish the standard is accelerating due to increasing bandwidth demands from the AI sector.Β DDR6 is expected to deliver a significant performance uplift over DDR5, with target data transfer speeds ranging from 8.8Gbps to 17.6Gbps. This increase is supported by a shift to a 4Γ24-bit sub-channel architecture, a change from the 2Γ32-bit structure utilised by DDR5. To address signalling challenges at these higher frequencies, the industry is exploring the use of CAMM2 technology to overcome the physical limitations of traditional DIMM form factors.
Current industry estimates project the commercialisation of DDR6 in 2028 or later, with server platforms expected to lead the transition.
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