NAND flash memory operates on the principle of holding a charge that represents binary values. Various architectures have and do exist to achieve this goal, with their own nuances. Addressing relies on rows and columns and the 3D nature of modern flash introduces additional factors, including a larger effective cell area.
Old Section
- Floating Gate (FG)
- Charge Trap Flash (CTF)
- BiCS and Variants
- Replacement Gate (RG)
- Split-Gate
- Bit Lines and Word Lines