The ongoing constraints in the DRAM sphere are now forcing AI hyperscalers to resort to quirky hacks just to get their hands on desperately needed memory, as Google appears to be doing with its retired servers by stripping them of their DDR4 modules. Google is now apparently reusing older DDR4 modules in retired servers, establishing an internal recycling supply chain of sorts Nikhil Cherian, the senior director of Google's supply chain infrastructure, disclosed at a summit forum recently that the AI industry has rapidly shifted from being compute-constrained to memory-constrained, with high-performance memory already accounting for around 75 percent of […]

Read full article at https://wccftech.com/google-is-now-pulling-ddr4-modules-out-of-retired-servers-and-reusing-them-in-new-ai-servers/

Hot Chips 2026 sees Google discussing its new eighth-generation TPU family for the technical crowd. One of the only hyperscalers to develop its own training hardware, the company has developed the TPU 8t for training, as well as the TPU 8i for inference

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Qualcomm's Modular software is now open-source as a big announcement from ModCon 2026 and an unexpected guest made an appearance

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With the AI race in full swing, big tech is constantly on the lookout to make custom chips that are able to compete with or offer alternatives to NVIDIA's pricey and short-in-supply GPUs. Google's Tensor Processing Units (TPUs) and Amazon's Trainium chips are among several that rely on less power consumption and costs to augment NVIDIA's products in AI computing. Now, a report from Morgan Stanley claims that Google's new TPU chips will be tailored to its Gemini models and eliminate the need for TSMC's chip-on-wafer-on-substrate (CoWoS) chip packaging technology. Google Is Considering To Place New TPU Chip's RAM Directly […]

Read full article at https://wccftech.com/googles-frozen-v2-tpu-hardwires-sram-onto-silicon-ditching-tsmcs-cowos-packaging-for-gemini/

Korean chip giant Samsung is reportedly considering outsourcing orders to design a portion of Google's Tensor Processing Unit (TPU) AI chips. Samsung is believed to be Google's manufacturing partner for the TPU chip's input/output (I/O) die. While the TPU's compute tile is expected to be manufactured by TSMC, the part on which the tile will be connected, called the I/O, is said to be Samsung's responsibility. For the I/O, Samsung is considering outsourcing the back-end design for the chip in order to ensure that Google's design is fit for its manufacturing facilities, says the Korean press. Several Korean Firms in […]

Read full article at https://wccftech.com/samsung-reportedly-outsources-googles-tpu-i-o-late-stage-design-says-report/

OpenAI has just announced its first custom chip called Jalapeño, which is aimed at AI Inference workloads & produced by Broadcom. OpenAI Designed & Built Its First Custom AI Silicon, The Jalapeño Chip, For Agentic AI Today, OpenAI announced that it has built and designed its first AI chip, which they are calling Jalapeño. Interesting choice of name for a chip that came fresh off the baking ovens at Broadcom, who are responsible for producing this chip. The Jalapeño Intelligence Processor and its first wafer were shown off by OpenAI's CEO, Sam Altman, and Broadcom's CEO, Hock Tan. This chip […]

Read full article at https://wccftech.com/openai-first-custom-chip-is-as-hot-as-a-jalapeno-the-best-inference-platform-for-llms/

That memory chips are scarce at the moment is hardly news that raises eyebrows these days. Even so, there appears to be a bit of desperation in the air that was not an elemental presence as recently as just a few weeks back. As a case in point, consider the latest tidbit: Google might procure memory chips from China's CXMT, upending the monopolistic dynamics in the memory sphere, and potentially opening a floodgate of similar deals. Google might tap China's upstart memory player, CXMT, as a hedge against the so-called Big 3: Samsung, SK hynix, and Micron According to the […]

Read full article at https://wccftech.com/a-wild-rumor-linked-to-sundar-pichai-suggests-google-is-evaluating-the-procurement-of-memory-chips-from-chinas-cxmt/

An efficient networking chip appears to be the need of the hour as AI data centers rapidly fill up with a giga-ton of ASICs, GPUs, and orchestration-oriented CPUs. As such, it is hardly a surprise that Google now appears to have tapped Marvell to design a custom networking chip for its TPUs on one of Intel's advanced node processes. Google is tackling the data latency conundrum head-on by tapping Marvell to design a custom networking chip for its TPUs on Intel's advanced lithography For the benefit of those who might not be aware, a networking chip links individual ASICs to […]

Read full article at https://wccftech.com/marvell-scores-another-win-after-nvidia-ceos-trillion-dollar-praise-as-google-hands-it-a-custom-networking-chip-for-the-tpuv8e-on-intels-18a-18ap-process/

While AI GPU giant NVIDIA's chips are widely believed to offer superior total cost of ownership (TCO) compared to custom AI chip alternatives, analysts from Evercore ISI believe that AI engineers are unimpressed by them. NVIDIA CEO Jensen Huang has defended his firm's AI chip price points on multiple occasions by claiming that they offer better performance efficiency compared to peers. However, according to the Evercore report, AI engineers are also focused on other metrics, such as the cost of cooling the chips, when deciding which products to use. Power Consumption & Cooling Are Important For NVIDIA's AI Chip Costs, […]

Read full article at https://wccftech.com/nvidia-loses-ground-with-ai-engineers-as-cooling-and-power-costs-push-hyperscalers-toward-custom-asics-evercore-warns/

Investment bank Morgan Stanley believes that even though building a data center with NVIDIA's Blackwell GPUs costs twice as much as building one with AI application-specific integrated circuits (ASICs), the computing power efficiency of the NVIDIA chips is significantly greater than the custom chips as well. The high costs of NVIDIA's latest AI GPUs are a hot-button market topic, with CEO Jensen Huang having asserted on multiple occasions that even though his chips are pricey, they offer greater returns over the long term. NVIDIA's Compute Performance Per Watt Is Up to 8x Ahead Of Custom AI Chips, Says Morgan Stanley […]

Read full article at https://wccftech.com/nvidia-blackwell-costs-twice-as-much-as-google-and-amazons-custom-ai-chips-yet-morgan-stanley-says-its-worth-it/

Intel's crucial EMIB technology has achieved a phenomenal yield rate, showing its readiness for upcoming adoptions in AI datacenter chips. Intel EMIB Is The Single Most Crucial Foundry Tech From Chipzilla, Which Will Set It As An Advanced Packaging Competitor to TSMC We recently discussed how EMIB is being eyed by AI firms for their next-generation AI chips. The tech has one simple purpose: to provide a cost-effective and scalable alternative to TSMC's CoWoS technology. The advanced packaging tech from Intel is set to be used by Google in its next-generation TPUs, and we have also cited NVIDIA using it […]

Read full article at https://wccftech.com/intel-emib-hits-90-percent-yield-signaling-foundry-breakthrough-emib-t-scales-12x-reticle-2028/

Today we got a glimpse of Google TPU 8i and TPU 8t designed specifically for the company's AI inference and training compute

The post Google TPU 8i for Inference and TPU 8t for Training Announced appeared first on ServeTheHome.

Google is reportedly working with Marvell on the development of two chips, one of which optimizes existing TPUs, & the other one is a next-gen TPU design. Google Might Join Forces With Marvell To Further Enhance the TPU Ecosystem For Next-Gen AI Models Talks between Google & Marvell have commenced on the development of two brand new chips for AI inference, reports The Information. Google is in talks with Marvell Technology to develop two new chips aimed at running AI models more efficiently, according to two people with direct knowledge of the discussions. One is a memory processing unit designed […]

Read full article at https://wccftech.com/google-pulls-marvell-into-a-two-chip-tpu-plan-reshaping-ai-inference-for-asics/

The startup was founded by former Google TPU engineers in 2023.